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Jose Luis Guntzel
Jose Luis Guntzel
Full Professor at Federal University of Santa Catarina (UFSC), Brazil
Verified email at ufsc.br
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Cited by
Year
Timing-driven placement based on dynamic net-weighting for efficient slack histogram compression
C Guth, V Livramento, R Netto, R Fonseca, JL Güntzel, L Santos
Proceedings of the 2015 Symposium on International Symposium on Physical …, 2015
292015
High throughput multitransform and multiparallelism IP for H. 264/AVC video compression standard
L Agostini, R Porto, J Guntzel, IS Silva, S Bampi
2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-5422, 2006
292006
A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design
J Monteiro, JL Güntzel, L Agostini
2011 18th IEEE International Conference on Electronics, Circuits, and …, 2011
282011
A hybrid technique for discrete gate sizing based on lagrangian relaxation
VS Livramento, C Guth, JL Guentzel, MO Johann
ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (4 …, 2014
252014
Fast and efficient lagrangian relaxation-based discrete gate sizing
VS Livramento, C Guth, JL Güntzel, MO Johann
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
212013
Energy-efficient SATD for beyond HEVC
I Seidel, AB Bräscher, JL Güntzel, L Agostini
2016 IEEE international symposium on circuits and systems (ISCAS), 802-805, 2016
202016
High throughput FPGA based architecture for H. 264/AVC inverse transforms and quantization
L Agostini, M Porto, JL Guntzel, R Porto, S Bampi
2006 49th IEEE International Midwest Symposium on Circuits and Systems 1 …, 2006
162006
A post-compiling approach that exploits code granularity in scratchpads to improve energy efficiency
DP Volpato, AKI Mendonca, LCV dos Santos, JL Güntzel
2010 IEEE Computer Society Annual Symposium on VLSI, 127-132, 2010
152010
A transistor sizing method applied to an automatic layout generation tool
C Santos, G Wilke, C Lazzari, R Reis, JL Guntzel
16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003 …, 2003
152003
Energy-efficient Hadamard-based SATD architectures
LH Cancellier, AB Bräscher, I Seidel, JL Güntzel
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-6, 2014
142014
Energy-efficient Hadamard-based SATD hardware architectures through calculation reuse
I Seidel, M Monteiro, B Bonotto, LV Agostini, JL Güntzel
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2102-2115, 2019
132019
Combining pel decimation with partial distortion elimination to increase SAD energy efficiency
I Seidel, AB Bräscher, JL Güntzel
2015 25th International Workshop on Power and Timing Modeling, Optimization …, 2015
132015
How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library
T Fontana, R Netto, V Livramento, C Guth, S Almeida, L Pilla, JL Güntzel
Proceedings of the 2017 ACM on International Symposium on Physical Design, 25-31, 2017
122017
A New Macro-cell Generation Strategy for three metal layer CMOS Technologies.
C Lazzari, CV Domingues, JLA Güntzel, RA da Luz Reis
VLSI-SOC, 193-197, 2003
122003
Asynchronous circuits design: An architectural approach
M Renaudin, J Fragoso, J Guntzel, R Reis
Guntzel J. and Reis R. V Escola de Microeletrônica da SBC-Sul, Rio Grande …, 2003
122003
A high throughput configurable FFT processor for WLAN and WiMax protocols
R Netto, JL Güntzel
2012 VIII Southern Conference on Programmable Logic, 1-5, 2012
112012
ILP-based global routing optimization with cell movements
TA Fontana, E Aghaeekiasaraee, R Netto, SF Almeida, U Gandh, ...
2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 25-30, 2021
102021
Coding-and energy-efficient FME hardware design
I Seidel, V Rodrigues Filho, L Agostini, JL Güntzel
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
102018
Mapping data and code into scratchpads from relocatable binaries
AKI Mendonca, DP Volpato, JL Güntzel, LCV Santos
2009 IEEE Computer Society Annual Symposium on VLSI, 157-162, 2009
102009
Algorithm selection framework for legalization using deep convolutional neural networks and transfer learning
R Netto, S Fabre, TA Fontana, V Livramento, LL Pilla, L Behjat, JL Güntzel
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
92021
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