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S W Ricky Lee
S W Ricky Lee
Chair Professor, HKUST, FIEEE, FASME, FInstP, FIMAPS
Verified email at ust.hk - Homepage
Title
Cited by
Cited by
Year
Electronics manufacturing
J Lau, CP Wong, NC Lee, R Lee
McGraw-Hill, Inc., 2002
3262002
Chip Scale Package (CSP): Design, Materials, Process, Reliability & Applications
JH Lau, SWR Lee
McGraw-Hill, 1999
2871999
Experimental investigations and model study of moisture behaviors in polymeric materials
XJ Fan, SWR Lee, Q Han
Microelectronics Reliability 49 (8), 861-871, 2009
1972009
Dynamic penetration of graphite/epoxy laminates impacted by a blunt-ended projectile
SWR Lee, CT Sun
Composites Science and Technology 49 (4), 369-380, 1993
1801993
Characterization and analysis on the solder ball shear testing conditions
X Huang, SWR Lee, CC Yan, S Hui
2001 Proceedings. 51st Electronic Components and Technology Conference (Cat …, 2001
1082001
Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers
HS Lau, SW Lee, MMF Yuen, J Wu, CC Lo, H Fan, H Chen
US Patent 8,604,603, 2013
1032013
Effects of underfill material properties on the reliability of solder bumped flip chip on board with imperfect underfill encapsulants
JH Lau, SWR Lee, C Chang, C Ouyang
1999 Proceedings. 49th Electronic Components and Technology Conference (Cat …, 1999
981999
Microvias for Low-Cost High-Density Interconnects
J Lau, SW Lee
McGraw-Hill, New York, NY, 2001
912001
A quasi-static penetration model for composite laminates
SWR Lee, CT Sun
Journal of Composite Materials 27 (3), 251-271, 1993
891993
High-speed solder ball shear and pull tests vs. board level mechanical drop tests: correlation of failure mode and loading speed
F Song, SWR Lee, K Newman, B Sykes, S Clark
2007 Proceedings 57th Electronic Components and Technology Conference, 1504-1513, 2007
882007
3D stacked flip chip packaging with through silicon vias and copper plating or conductive adhesive filling
SWR Lee, R Hon, SXD Zhang, CK Wong
Proceedings Electronic Components and Technology, 2005. ECTC'05., 795-801, 2005
852005
Design, materials, process, fabrication, and reliability of fan-out wafer-level packaging
JH Lau, M Li, QM Li, I Xu, T Chen, Z Li, KH Tan, QX Yong, Z Cheng, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology 8 (6 …, 2018
842018
Effects of build-up printed circuit board thickness on the solder joint reliability of a wafer level chip scale package (WLCSP)
JH Lau, SWR Lee
IEEE transactions on components and packaging technologies 25 (1), 3-14, 2002
842002
Modeling and analysis of 96.5 Sn-3.5 Ag lead-free solder joints of wafer level chip scale package on buildup microvia printed circuit board
JH Lau, SWR Lee
IEEE Transactions on Electronics Packaging Manufacturing 25 (1), 51-58, 2002
822002
Fan-out wafer-level packaging for heterogeneous integration
JH Lau, M Li, ML Qingqian, T Chen, I Xu, QX Yong, Z Cheng, N Fan, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology 8 (9 …, 2018
802018
Investigation of IMC thickness effect on the lead-free solder ball attachment strength: comparison between ball shear test and cold bump pull test results
F Song, SWR Lee
56th Electronic Components and Technology Conference 2006, 8 pp., 2006
782006
3D LED and IC wafer level packaging
J Lau, R Lee, M Yuen, P Chan
Microelectronics International 27 (2), 98-105, 2010
772010
Brittle failure mechanism of SnAgCu and SnPb solder balls during high speed ball shear and cold ball pull tests
F Song, SWR Lee, K Newman, B Sykes, S Clark
2007 Proceedings 57th Electronic Components and Technology Conference, 364-372, 2007
772007
Multistack flip chip 3D packaging with copper plated through-silicon vertical interconnection
R Hon, SWR Lee, SX Zhang, CK Wong
2005 7th Electronic Packaging Technology Conference 2, 6 pp., 2005
722005
Damage in composite laminates: effects of transverse cracks
CT Herakovich, J Aboudi, SW Lee, EA Strauss
Mechanics of materials 7 (2), 91-107, 1988
691988
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