Berkin Akin
Cited by
Cited by
Data reorganization in memory using 3D-stacked DRAM
B Akin, F Franchetti, JC Hoe
ACM SIGARCH Computer Architecture News 43 (3), 131-143, 2015
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing
Q Zhu, B Akin, HE Sumbul, F Sadi, JC Hoe, L Pileggi, F Franchetti
3D Systems Integration Conference (3DIC), 2013 IEEE International, 1-7, 2013
3D-stacked memory-side acceleration: Accelerator and system design
Q Guo, N Alachiotis, B Akin, F Sadi, G Xu, TM Low, L Pileggi, JC Hoe, ...
Workshop on Near-Data Processing (WoNDP)(Held in conjunction with MICRO-47), 2014
Memory bandwidth efficient two-dimensional fast Fourier transform algorithm and implementation for large problem sizes
B Akin, PA Milder, F Franchetti, JC Hoe
2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012
Understanding the design space of dram-optimized hardware FFT accelerators
B Akin, F Franchetti, JC Hoe
Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE …, 2014
Hamlet: Hardware accelerated memory layout transform within 3d-stacked dram
B Akın, JC Hoe, F Franchetti
High Performance Extreme Computing Conference (HPEC), 2014 IEEE, 0
Accelerator-aware neural network design using automl
S Gupta, B Akin
arXiv preprint arXiv:2003.02838, 2020
FFTs with near-optimal memory access through block data layouts
B Akin, F Franchetti, JC Hoe
Acoustics, Speech and Signal Processing (ICASSP), 2014 IEEE International …, 2014
Mobiledets: Searching for object detection architectures for mobile accelerators
Y Xiong, H Liu, S Gupta, B Akin, G Bender, Y Wang, PJ Kindermans, ...
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2021
Zcomp: Reducing dnn cross-layer memory footprint using vector extensions
B Akin, ZA Chishti, AR Alameldeen
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation
B Akin, F Franchetti, JC Hoe
Journal of Signal Processing Systems, 1-16, 2015
Hamlet architecture for parallel data reorganization in memory
B Akin, F Franchetti, JC Hoe
IEEE Micro 36 (1), 14-23, 2015
Enabling portable energy efficiency with memory accelerated library
Q Guo, TM Low, N Alachiotis, B Akin, L Pileggi, JC Hoe, F Franchetti
2015 48th Annual IEEE/ACM International Symposium on Microarchitecture …, 2015
Algorithm/hardware co-optimized sar image reconstruction with 3d-stacked logic in memory
F Sadi, B Akin, DT Popovici, JC Hoe, L Pileggi, F Franchetti
2014 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2014
Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models
A Boroumand, S Ghose, B Akin, R Narayanaswami, GF Oliveira, X Ma, ...
arXiv preprint arXiv:2103.00768, 2021
Memory system characterization of deep learning workloads
Z Chishti, B Akin
Proceedings of the International Symposium on Memory Systems, 497-505, 2019
An evaluation of edge tpu accelerators for convolutional neural networks
A Yazdanbakhsh, K Seshadri, B Akin, J Laudon, R Narayanaswami
arXiv preprint arXiv:2102.10423, 2021
Apparatus and method for a tensor permutation engine
B Akin
US Patent 10,908,906, 2021
Discovering multi-hardware mobile models via architecture search
G Chu, O Arikan, G Bender, W Wang, A Brighton, PJ Kindermans, H Liu, ...
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2021
System, apparatus and method for overriding of non-locality-based instruction handling
B Akin, R Agarwal, JS Park, CJ Hughes
US Patent 10,402,336, 2019
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