Edson Horta
Edson Horta
SSRG (Systems Software Research Group) - Virginia Tech
Verified email at vt.edu
TitleCited byYear
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
EL Horta, JW Lockwood, DE Taylor, D Parlour
Proceedings of the 39th annual Design Automation Conference, 343-348, 2002
2352002
PARBIT: a tool to transform bitfiles to implement partial reconfiguration of field programmable gate arrays (FPGAs)
EL Horta, JW Lockwood
1202001
Dynamic hardware plugins: Exploiting reconfigurable hardware for high-performance programmable routers
DE Taylor, JS Turner, JW Lockwood, EL Horta
Computer Networks 38 (3), 295-310, 2002
902002
Automated method to generate bitstream intellectual property cores for Virtex FPGAs
EL Horta, JW Lockwood
International Conference on Field Programmable Logic and Applications, 975-979, 2004
572004
Using PARBIT to implement partial run-time reconfigurable systems
EL Horta, JW Lockwood, ST Kofuji
International Conference on Field Programmable Logic and Applications, 182-191, 2002
472002
BITMAN: A tool and API for FPGA bitstream manipulations
KD Pham, E Horta, D Koch
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
302017
Field trial for Brazilian DTV using space diversity
C Akamine, F Yamada, G Bedicks, CE da Silva Dantas, F Sukys, ...
2010 IEEE International Symposium on Broadband Multimedia Systems and …, 2010
172010
Parbit: A tool to transform bitfiles to implement partial reconfiguration of field programmable gate arrays (fpgas). Washington University
E Horta, JW Lockwood
Department of Computer Science, Technical Report WUCS-01-13, 2001
132001
Field measurements for ISDB-TBin the VHF band
G Bedicks, F Sukys, EL Horta, R de Mendonça Maroja, G de Melo Valeira, ...
2011 IEEE International Symposium on Broadband Multimedia Systems and …, 2011
112011
Performance evaluation of Brazilian DTV mobile reception
G Bedicks, F Yamada, C Akamine, EL Horta, F Sukys, RE Motoyama
2009 IEEE International Symposium on Broadband Multimedia Systems and …, 2009
92009
A run-time reconfigurable ATM switch
EL Horta, ST Kofuji
ipdps, 0156b, 2002
72002
The architecture of a reconfigurable ATM switch (RECATS)
EL Horta, ST Kofuji
Computação reconfigurável: experiências e perspectivas: CORE 2000, 2000
72000
A proposal to use cloud transmission technique into the ISDB-T system
LF da Silva, C Akamine, YP Maciel, G Bedicks, EL Horta
2015 IEEE International Symposium on Broadband Multimedia Systems and …, 2015
42015
Adaptive gap filler for digital terrestrial television
C Rocha, C Akamine, G Bedicks, EL Horta, G Stolfi
2014 IEEE International Symposium on Broadband Multimedia Systems and …, 2014
42014
Development Tools for Partial Reconfigurable Systems
F Valiante Filho, EL Horta
2008 4th Southern Conference on Programmable Logic, 249-252, 2008
42008
Projeto de circuitos com MAX+ PLUS II
E Ranzini, EL Horta, ET MIDORIKAWA
Apostila de Laboratório Digital, 2002
32002
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs
K Pham, E Horta, D Koch, A Vaishnav, T Kuhn
2018 IEEE 12th International Symposium on Embedded Multicore/Many-core …, 2018
22018
Accelerating linux bash commands on fpgas using partial reconfiguration
E Horta, X Shen, K Pham, D Koch
FSP 2017; Fourth International Workshop on FPGAs for Software Programmers, 1-7, 2017
22017
Architecture analysis of an FPGA-based Hopfield neural network
MAA Sousa, EL Horta, ST Kofuji, E Del-Moral-Hernandez
Advances in Artificial Neural Systems 2014, 15, 2014
22014
Implementing a dynamically reconfigurable ATM switch on the VIRTEX FPGA of the FPX platform
EL Horta, JW Lockwood, ST Kofuji
Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing …, 2002
22002
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