Kisik Choi
Kisik Choi
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Cited by
Cited by
Method of forming a semiconductor device
M Hargrove, RJ Carter, YH Tsang, G Kluth, K Choi
US Patent 8,048,791, 2011
Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling
E Cartier, A Kerber, T Ando, MM Frank, K Choi, S Krishnan, B Linder, ...
2011 International Electron Devices Meeting, 18.4. 1-18.4. 4, 2011
gate dielectric with 0.5 nm equivalent oxide thickness
H Harris, K Choi, N Mehta, A Chandolu, N Biswas, G Kipshidze, ...
Applied physics letters 81 (6), 1065-1067, 2002
Semiconductor gate structure for threshold voltage modulation and method of making same
H Kim, K Choi
US Patent 8,932,923, 2015
Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42 nm) using remote interfacial layer scavenging technique and Vt-tuning dipoles with gate …
T Ando, MM Frank, K Choi, C Choi, J Bruley, M Hopstaken, M Copel, ...
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
Common fabrication of different semiconductor devices with different threshold voltages
H Kim, K Choi, JY Lee
US Patent App. 14/134,358, 2015
Intrinsic characteristics of high-k devices and implications of fast transient charging effects (FTCE)
BH Lee, CD Young, R Choi, JH Sim, G Bersuker, CY Kang, R Harris, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
Enabling enhanced reliability and mobility for replacement gate planar and finfet structures
T Ando, EA Cartier, K Choi, WL Lai, V Narayanan, R Ramachandran
US Patent App. 14/696,015, 2015
Methods of forming gate structures with multiple work functions and the resulting products
K Choi, H Kim
US Patent 9,012,319, 2015
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
K Choi, H Jagannathan, C Choi, L Edge, T Ando, M Frank, P Jamison, ...
2009 Symposium on VLSI Technology, 138-139, 2009
Decoupling the Fermi-level pinning effect and intrinsic limitations on p-type effective work function metal electrodes
HC Wen, P Majhi, K Choi, CS Park, HN Alshareef, HR Harris, H Luan, ...
Microelectronic Engineering 85 (1), 2-8, 2008
Thermally stable N-metal gate MOSFETs using La-incorporated HfSiO dielectric
H Alshareef, H Harris, H Wen, C Park, C Huffman, K Choi, H Luan, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 7-8, 2006
Comparison of effective work function extraction methods using capacitance and current measurement techniques
HC Wen, R Choi, GA Brown, T BosckeBoscke, K Matthews, HR Harris, ...
IEEE Electron Device Letters 27 (7), 598-601, 2006
Growth mechanism of TiN film on dielectric films and the effects on the work function
K Choi, P Lysaght, H Alshareef, C Huffman, HC Wen, R Harris, H Luan, ...
Thin Solid Films 486 (1-2), 141-144, 2005
Methods of forming replacement gate structures for transistors and the resulting devices
R Xie, K Choi, SC Fan, S Ponoth
US Patent 9,257,348, 2016
Effective work function modification of atomic-layer-deposited-TaN film by capping layer
K Choi, HN Alshareef, HC Wen, H Harris, H Luan, Y Senzaki, P Lysaght, ...
Applied physics letters 89 (3), 032113, 2006
The effect of metal thickness, overlayer and high-k surface treatment on the effective work function of metal electrode
K Choi, HC Wen, H Alshareef, R Harris, P Lysaght, H Luan, P Majhi, ...
Proceedings of 35th European Solid-State Device Research Conference, 2005 …, 2005
A novel electrode-induced strain engineering for high performance SOI FinFET utilizing Si (1hannel for Both N and PMOSFETs
CY Kang, R Choi, SC Song, K Choi, BS Ju, MM Hussain, BH Lee, ...
2006 International Electron Devices Meeting, 1-4, 2006
Composition dependence of the work function of metal gates
HN Alshareef, K Choi, HC Wen, H Luan, H Harris, Y Senzaki, P Majhi, ...
Applied Physics Letters 88 (7), 072108, 2006
Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices
R Xie, K Choi
US Patent 9,093,467, 2015
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