Παρακολούθηση
Mitra Purandare
Mitra Purandare
Άγνωστη συνεργασία
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα ost.ch
Τίτλος
Παρατίθεται από
Παρατίθεται από
Έτος
Interpolant strength
V D’Silva, D Kroening, M Purandare, G Weissenbacher
Verification, Model Checking, and Abstract Interpretation: 11th …, 2010
1272010
Mutation-based test case generation for simulink models
A Brillout, N He, M Mazzucchi, D Kroening, M Purandare, P Rümmer, ...
International Symposium on Formal Methods for Components and Objects, 208-227, 2009
952009
Vacuum cleaning CTL formulae
M Purandare, F Somenzi
Computer Aided Verification: 14th International Conference, CAV 2002 …, 2002
742002
Dos and don'ts of CTL state coverage estimation
N Jayakumar, M Purandare, F Somenzi
Proceedings of the 40th annual Design Automation Conference, 292-295, 2003
522003
Formal techniques for effective co-verification of hardware/software co-designs
R Mukherjee, M Purandare, R Polig, D Kroening
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
392017
Approximation refinement for interpolation-based model checking
V D’Silva, M Purandare, D Kroening
Verification, Model Checking, and Abstract Interpretation: 9th International …, 2008
222008
Coverage in interpolation-based model checking
H Chockler, D Kroening, M Purandare
Proceedings of the 47th Design Automation Conference, 182-187, 2010
192010
EBMC
D Kroening, M Purandare
11
Method for verifying hardware/software co-designs
M Purandare
US Patent 9,996,637, 2018
102018
Accelerated analysis of Boolean gene regulatory networks
M Purandare, R Polig, C Hagleitner
2017 27th International Conference on Field Programmable Logic and …, 2017
92017
Strengthening properties using abstraction refinement
M Purandare, T Wahl, D Kroening
2009 Design, Automation & Test in Europe Conference & Exhibition, 1692-1697, 2009
82009
Agile autotuning of a transprecision tensor accelerator overlay for TVM compiler stack
D Diamantopoulos, B Ringlein, M Purandare, G Singh, C Hagleitner
2020 30th International Conference on Field-Programmable Logic and …, 2020
72020
Ebmc: The enhanced bounded model checker
D Kroening, M Purandare
Accessed, 2019
72019
Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
D Diamantopoulos, R Polig, B Ringlein, M Purandare, B Weiss, ...
2021 IEEE 14th International Conference on Cloud Computing (CLOUD), 726-729, 2021
62021
Fpga accelerated analysis of boolean gene regulatory networks
M Manica, R Polig, M Purandare, R Mathis, C Hagleitner, MR Martinez
IEEE/ACM Transactions on Computational Biology and Bioinformatics 17 (6 …, 2019
62019
Computing mutation coverage in interpolation-based model checking
H Chockler, D Kroening, M Purandare
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012
52012
Restructuring resolution refutations for interpolation
V D’Silva, D Kroening, M Purandare, G Weissenbacher
Technical Report, 2008
52008
System and method for emulating a logic circuit design using programmable logic devices
M Desai, M Purandare, H Sharma, S Patkar
US Patent App. 11/207,559, 2006
52006
Learning framework for software-hardware model generation and verification
R Mukherjee, R Polig, M Purandare
US Patent 10,970,449, 2021
42021
Verifying correctness of regular expression transformations that use a post-processor
K Atasu, JR Baumgartner, C Hagleitner, M Purandare
US Patent 8,688,608, 2014
42014
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