Chrysostomos Nicopoulos
Chrysostomos Nicopoulos
Associate Professor, Department of ECE, University of Cyprus
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα ucy.ac.cy - Αρχική σελίδα
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Παρατίθεται από
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Design and management of 3D chip multiprocessors using network-in-memory
F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir
33rd International Symposium on Computer Architecture (ISCA'06), 130-141, 2006
5122006
ViChaR: A dynamic virtual channel regulator for network-on-chip routers
CA Nicopoulos, D Park, J Kim, N Vijaykrishnan, MS Yousif, CR Das
2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006
3822006
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ...
ACM SIGARCH Computer Architecture News 35 (2), 138-149, 2007
3562007
Exploring fault-tolerant network-on-chip architectures
D Park, C Nicopoulos, J Kim, N Vijaykrishnan, CR Das
International Conference on Dependable Systems and Networks (DSN'06), 93-104, 2006
3062006
A gracefully degrading and energy-efficient modular router architecture for on-chip networks
J Kim, C Nicopoulos, D Park, V Narayanan, MS Yousif, CR Das
ACM SIGARCH Computer Architecture News 34 (2), 4-15, 2006
2932006
Design and analysis of an NoC architecture from performance, reliability and energy perspective
J Kim, D Park, C Nicopoulos, N Vijaykrishnan, CR Das
2005 Symposium on Architectures for Networking and Communications Systems …, 2005
1472005
Performance and power optimization through data compression in network-on-chip architectures
R Das, AK Mishra, C Nicopoulos, D Park, V Narayanan, R Iyer, MS Yousif, ...
2008 IEEE 14th International Symposium on High Performance Computer …, 2008
1142008
A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks
TD Richardson, C Nicopoulos, D Park, V Narayanan, Y Xie, C Das, ...
19th International Conference on VLSI Design held jointly with 5th …, 2006
1142006
Nocalert: An on-line and real-time fault detection mechanism for network-on-chip architectures
A Prodromou, A Panteli, C Nicopoulos, Y Sazeides
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 60-71, 2012
1112012
Variation-aware task allocation and scheduling for MPSoC
F Wang, C Nicopoulos, X Wu, Y Xie, N Vijaykrishnan
2007 IEEE/ACM International Conference on Computer-Aided Design, 598-603, 2007
852007
On the effects of process variation in network-on-chip architectures
C Nicopoulos, S Srinivasan, A Yanamandra, D Park, V Narayanan, ...
IEEE Transactions on Dependable and Secure Computing 7 (3), 240-254, 2008
682008
On the effects of process variation in network-on-chip architectures
C Nicopoulos, S Srinivasan, A Yanamandra, D Park, V Narayanan, ...
IEEE Transactions on Dependable and Secure Computing 7 (3), 240-254, 2008
682008
Network-on-chip architectures: A holistic design exploration
C Nicopoulos, V Narayanan, CR Das
Springer Science & Business Media, 2009
632009
Design of a dynamic priority-based fast path architecture for on-chip interconnects
D Park, R Das, C Nicopoulos, J Kim, N Vijaykrishnan, R Iyer, CR Das
15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007), 15-20, 2007
602007
An energy-and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems
HG Lee, S Baek, C Nicopoulos, J Kim
2011 IEEE 29th International Conference on Computer Design (ICCD), 381-387, 2011
582011
Do we need wide flits in networks-on-chip?
J Lee, C Nicopoulos, SJ Park, M Swaminathan, J Kim
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2-7, 2013
512013
Optimizing data-center TCO with scale-out processors
B Grot, D Hardy, P Lotfi-Kamran, B Falsafi, C Nicopoulos, Y Sazeides
IEEE Micro 32 (5), 52-63, 2012
462012
ECM: Effective capacity maximizer for high-performance compressed caching
S Baek, HG Lee, C Nicopoulos, J Lee, J Kim
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
372013
Variation-aware task and communication mapping for mpsoc architecture
F Wang, Y Chen, C Nicopoulos, X Wu, Y Xie, N Vijaykrishnan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
362011
A dynamically adjusting gracefully degrading link-level fault-tolerant mechanism for NoCs
A Vitkovskiy, V Soteriou, C Nicopoulos
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012
352012
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