Dr.-Ing. Mateusz Majer
Dr.-Ing. Mateusz Majer
Continental Automotive GmbH
Verified email at continental.com
Title
Cited by
Cited by
Year
Dynoc: A dynamic infrastructure for communication in dynamically reconfugurable devices
C Bobda, A Ahmadinia, M Majer, J Teich, S Fekete, J van der Veen
International Conference on Field Programmable Logic and Applications, 2005 …, 2005
2072005
The Erlangen Slot Machine: A dynamically reconfigurable FPGA-based computer
M Majer, J Teich, A Ahmadinia, C Bobda
The Journal of VLSI Signal Processing Systems for Signal, Image, and Video …, 2007
1342007
The Erlangen slot machine: increasing flexibility in FPGA-based reconfigurable platforms
C Bobda, A Majer, A Ahmadinia, T Haller, A Linarth, J Teich
Proceedings. 2005 IEEE International Conference on Field-Programmable …, 2005
1082005
Packet routing in dynamically changing networks on chip
M Majer, C Bobda, A Ahmadinia, J Teich
19th IEEE International Parallel and Distributed Processing Symposium, 8 pp., 2005
792005
A practical approach for circuit routing on dynamic reconfigurable devices
A Ahmadinia, C Bobda, J Ding, M Majer, J Teich, SP Fekete, ...
16th IEEE International Workshop on Rapid System Prototyping (RSP'05), 84-90, 2005
722005
A dynamic NoC approach for communication in reconfigurable devices
C Bobda, M Majer, D Koch, A Ahmadinia, J Teich
International Conference on Field Programmable Logic and Applications, 1032-1036, 2004
672004
Task scheduling for heterogeneous reconfigurable computers
A Ahmadinia, C Bobda, D Koch, M Majer, J Teich
Proceedings of the 17th symposium on Integrated circuits and system design …, 2004
662004
Increasing the flexibility in fpga-based reconfigurable platforms: The erlangen slot machine
C Bobda, M Majer, A Ahmadinia, T Haller, A Linarth, J Teich
IEEE 2005 Conference on Field-Programmable Technology (FPT), 37-42, 2005
232005
Scheduling and CommunicationüAware Mapping of HW/SW Modules for Dynamically and Partially Reconfigurable SoC Architectures
SP Fekete, JC van der Veen, J Angermeier, D Goehringer, M Majer, ...
20th International Conference on Architecture of Computing Systems 2007, 1-9, 2007
212007
Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs.
C Bobda, A Ahmadinia, K Rajesham, M Majer, A Niyonkuru
ARCS Workshops, 61-66, 2005
162005
The Erlangen Slot Machine–A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM-Eine Hardware-Plattform für interdisziplinäre Forschung im …
J Angermeier, D Göhringer, M Majer, J Teich, SP Fekete, JC van der Veen
it-Information Technology 49 (3), 143-148, 2007
152007
Designing Partial and Dynamically Reconfigurable Applications on Xilinx Virtex-II FPGAs using Handel-C
C Bobda, M Huebner, A Niyonkuru, B Blodget, M Majer, A Ahmadinia
University of Erlangen-Nuremberg, Germany, Technical Report, 03-2004, 2004
152004
Offline and online aspects of defragmenting the module layout of a partially reconfigurable device
SP Fekete, JC van der Veen, A Ahmadinia, D Gohringer, M Majer, J Teich
IEEE transactions on very large scale integration (VLSI) systems 16 (9 …, 2008
142008
Minimizing communication cost for reconfigurable slot modules
SP Fekete, JC Van Der Veen, M Majer, J Teich
2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006
142006
Adaptive architectures for an OTN processor: Reducing design costs through reconfigurability and multiprocessing
T Murgan, M Petrov, M Majer, P Zipf, M Glesner, U Heinkel, J Pleickhardt, ...
Proceedings of the 1st conference on Computing frontiers, 404-418, 2004
102004
Reconfigurable HW/SW architecture of a real-time driver assistance system
J Angermeier, U Batzer, M Majer, J Teich, C Claus, W Stechele
International Workshop on Applied Reconfigurable Computing, 149-159, 2008
72008
Bridging the gap between relocatability and available technology: The erlangen slot machine
D Göhringer, M Majer, J Teich
Dagstuhl Seminar Proceedings, 2006
72006
ReCoNodes—Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices
A Ahmadinia, J Angermeier, SP Fekete, T Kamphans, D Koch, M Majer, ...
Dynamically Reconfigurable Systems, 199-221, 2010
62010
An FPGA-based dynamically reconfigurable platform: From concept to realization
M Majer
2006 International Conference on Field Programmable Logic and Applications, 1-2, 2006
52006
A flexible reconfiguration manager for the Erlangen Slot Machine
M Majer, A Ahmadinia, C Bobda, J Teich
ARCS'06, 19th International Conference on Architecture of Computing Systems, 2006
52006
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