| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 254 | 2020 |
| Workload-Aware Electromigration Analysis in Emerging Spintronic Memory Arrays SM Nair, M Mayahinia, MB Tahoori, M Perumkunnil, H Zahedmanesh, ... IEEE Transactions on Device and Materials Reliability 21 (2), 258-266, 2021 | 7 | 2021 |
| Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices T Marinelli, JIG Pérez, C Tenllado, M Komalan, M Gupta, F Catthoor ACM Transactions on Embedded Computing Systems (TECS) 21 (1), 1-20, 2022 | 4 | 2022 |
| Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM M Mayahinia, M Tahoori, MP Komalan, H Zahedmanesh, K Croes, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 3 | 2022 |
| COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications T Marinelli, JIG Pérez, C Tenllado, F Catthoor Journal of Systems Architecture 145 (103022), 2023 | 1 | 2023 |
| Hardware Implementation of a Post-Quantum Key Exchange T Marinelli Politecnico di Torino, 2018 | | 2018 |
