| A framework for supporting real-time applications on dynamic reconfigurable FPGAs A Biondi, A Balsini, M Pagani, E Rossi, M Marinoni, G Buttazzo 2016 IEEE Real-Time Systems Symposium (RTSS), 1-12, 2016 | 45 | 2016 |
| ARTE: arduino real-time extension for programming multitasking applications P Buonocunto, A Biondi, M Pagani, M Marinoni, G Buttazzo Proceedings of the 31st Annual ACM Symposium on Applied Computing, 1724-1731, 2016 | 15 | 2016 |
| Towards real-time operating systems for heterogeneous reconfigurable platforms M Pagani, M Marinoni, A Biondi, A Balsini, G Buttazzo 12th Workshop on Operating Systems Platforms for Embedded Real-Time …, 2016 | 9 | 2016 |
| A linux-based support for developing real-time applications on heterogeneous platforms with dynamic fpga reconfiguration M Pagani, A Balsini, A Biondi, M Marinoni, G Buttazzo 2017 30th IEEE International System-on-Chip Conference (SOCC), 96-101, 2017 | 7 | 2017 |
| Is your bus arbiter really fair? restoring fairness in axi interconnects for fpga socs F Restuccia, M Pagani, A Biondi, M Marinoni, G Buttazzo ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-22, 2019 | 6 | 2019 |
| A bandwidth reservation mechanism for AXI-based hardware accelerators on FPGAs M Pagani, E Rossi, A Biondi, M Marinoni, G Lipari, G Buttazzo 31st Euromicro Conference on Real-Time Systems (ECRTS 2019), 2019 | 5 | 2019 |
| Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs F Restuccia, M Pagani, A Biondi, M Marinoni, G Buttazzo 32nd Euromicro Conference on Real-Time Systems (ECRTS 2020), 2020 | 1 | 2020 |
| Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs BB Seyoum, M Pagani, A Biondi, S Balleri, G Buttazzo IEEE Transactions on Computers, 2020 | | 2020 |
| Enabling Predictable Hardware Acceleration in Heterogeneous SoC-FPGA Computing Platforms M Pagani Lille 1, 2020 | | 2020 |
| Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs (Artifact) F Restuccia, M Pagani, A Biondi, M Marinoni, G Buttazzo Schloss Dagstuhl-Leibniz-Zentrum für Informatik, 2020 | | 2020 |
| Software support for dynamic partial reconfigurable FPGAs on heterogeneous platforms M Pagani | | 2016 |
| List of Secondary Reviewers L Abeni, SA Rashid, N Ackerman, B Alahmad, MA Awan, J An, ... | | |
