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Ian Cayrefourcq
Ian Cayrefourcq
CTO at ITEN
Verified email at iten.com
Title
Cited by
Cited by
Year
Strained FDSOI CMOS technology scalability down to 2.5nm film thickness and 18nm gate length with a TiN/HfO2gate stack
V Barral, T Poiroux, F Andrieu, C Buj-Dufournet, O Faynot, T Ernst, ...
2007 IEEE International Electron Devices Meeting, 61-64, 2007
932007
Passive alignment using slanted wall pedestal
I Cayrefourcq, C Pusarla
US Patent 6,643,434, 2003
882003
Impact of strained-silicon-on-insulator (sSOI) substrate on FinFET mobility
W Xiong, CR Cleavelin, P Kohli, C Huffman, T Schulz, K Schruefer, ...
IEEE Electron Device Letters 27 (7), 612-614, 2006
812006
Performance enhancement of MUGFET devices using super critical strained-SOI (SC-SSOI) and CESL
N Collaert, R Rooyackers, F Clemente, P Zimmerman, I Cayrefourcq, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 52-53, 2006
652006
Advanced SOI Substrate Manufacturing
C Mazuré, GK Celler, C Maleville, I Cayrefourcq
2004 International Conference on Integrated Circuit Design and Technology …, 2004
632004
Electro-optical device, notably for optical distribution
I Cayrefourcq
US Patent 6,212,319, 2001
582001
Method of detaching a thin film at moderate temperature after co-implantation
I Cayrefourcq, NB Mohamed, C Lagahe-Blanchard, NP Nguyen
US Patent 7,176,108, 2007
462007
25nm Short and narrow strained FDSOI with TiN/HfO2 gate stack
S Deleonibus, C Mazure, P Gaud, H Grampeix, JP Colonna, B Previtali, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 134-135, 2006
452006
Method of catastrophic transfer of a thin film after co-implantation
NP Nguyen, I Cayrefourcq, C Lagahe-Blanchard
US Patent 7,772,087, 2010
332010
Study of HCl and secco defect etching for characterization of thick sSOI
A Abbadie, SW Bedell, JM Hartmann, DK Sadana, F Brunier, C Figuet, ...
Journal of The Electrochemical Society 154 (8), H713, 2007
332007
Impact of Mobility Boosters (XsSOI, CESL, TiN gate) on the Performance of< 100> or< 110> oriented FDSOI cMOSFETs for the 32nm Node
F Andrieu, O Faynot, F Rochette, JC Barbé, C Buj, Y Bogumilowicz, ...
2007 IEEE Symposium on VLSI Technology, 50-51, 2007
332007
Ultra-thin fully depleted SOI devices with thin BOX, ground plane and strained liner booster
C Gallon, C Fenouillet-Beranger, A Vandooren, F Boeuf, S Monfray, ...
2006 IEEE international SOI Conferencee Proceedings, 17-18, 2006
332006
Mechanism of the Smart Cut™ layer transfer in silicon by hydrogen and helium coimplantation in the medium dose range
P Nguyen, I Cayrefourcq, KK Bourdelle, A Boussagol, E Guiot, ...
Journal of applied physics 97 (8), 083527, 2005
332005
MEMS-based selectable laser source
I Cayrefourcq, PP Maigne
US Patent 6,693,926, 2004
302004
New layer transfers obtained by the SmartCut process
H Moriceau, F Fournel, B Aspar, B Bataillou, A Beaumont, C Morales, ...
Journal of Electronic Materials 32 (8), 829-835, 2003
302003
Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation
NP Nguyen, I Cayrefourcq, C Lagahe-Blanchard, K Bourdelle, A Tauzin, ...
US Patent 8,309,431, 2012
262012
Performance of super-critical strained-Si directly on insulator (SC-SSOI) CMOS based on high-performance PD-SOI technology
AVY Thean, T White, M Sadaka, L McCormick, M Ramon, R Mora, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 134-135, 2005
252005
Stress hybridization for multigate devices fabricated on supercritical strained-SOI (SC-SSOI)
N Collaert, R Rooyackers, A De Keersgieter, FE Leys, I Cayrefourcq, ...
IEEE electron device letters 28 (7), 646-648, 2007
232007
Strain-enhanced CMOS through novel process-substrate stress hybridization of super-critically thick strained silicon directly on insulator (SC-SSOI)
C Mazure, I Cayrefourcq, J Mogab, S Venkatesan, BE White, BY Nguyen, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 130-131, 2006
222006
Method of manufacturing a wafer
T Maurice, I Cayrefourcq, F Fournel
US Patent 6,838,358, 2005
212005
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