Sani Nassif
Sani Nassif
Radyalis LLC
Verified email at radyalis.com - Homepage
Title
Cited by
Cited by
Year
High-performance CMOS variability in the 65-nm regime and beyond
K Bernstein, DJ Frank, AE Gattiker, W Haensch, BL Ji, SR Nassif, ...
IBM journal of research and development 50 (4.5), 433-449, 2006
6652006
Modeling and analysis of manufacturing variations
SR Nassif
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No …, 2001
5342001
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events
R Kanj, R Joshi, S Nassif
2006 43rd ACM/IEEE Design Automation Conference, 69-72, 2006
3842006
Full chip leakage estimation considering power supply and temperature variations
H Su, F Liu, A Devgan, E Acar, S Nassif
Proceedings of the 2003 international symposium on Low power electronics and …, 2003
3372003
A multigrid-like technique for power grid analysis
JN Kozhaya, SR Nassif, FN Najm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
3232002
Delay variability: sources, impacts and trends
S Nassif
2000 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2000
3012000
Design for variability in DSM technologies [deep submicron technologies]
SR Nassif
Proceedings IEEE 2000 First International Symposium on Quality Electronic …, 2000
2882000
Handbook of algorithms for physical design automation
CJ Alpert, DP Mehta, SS Sapatnekar
CRC press, 2008
2692008
Design for manufacturability and statistical design: a constructive approach
M Orshansky, S Nassif, D Boning
Springer Science & Business Media, 2007
2692007
Models of process variations in device and interconnect
D Boning, S Nassif
Design of high performance microprocessor circuits, 6, 2000
2412000
Fast power grid simulation
SR Nassif, JN Kozhaya
Proceedings of the 37th Annual Design Automation Conference, 156-161, 2000
2342000
Optimal decoupling capacitor sizing and placement for standard-cell layout designs
H Su, SS Sapatnekar, SR Nassif
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
230*2003
Power grid analysis benchmarks
SR Nassif
2008 Asia and South Pacific Design Automation Conference, 376-381, 2008
2172008
Reliable on-chip systems in the nano-era: Lessons learnt and future trends
J Henkel, L Bauer, N Dutt, P Gupta, S Nassif, M Shafique, M Tahoori, ...
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-10, 2013
2152013
Random walks in a supply network
H Qian, SR Nassif, SS Sapatnekar
Proceedings of the 40th Annual Design Automation Conference, 93-98, 2003
2092003
Benefits and costs of power-gating technique
H Jiang, M Marek-Sadowska, SR Nassif
2005 International conference on computer design, 559-566, 2005
2012005
Power grid analysis using random walks
H Qian, SR Nassif, SS Sapatnekar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1942005
Statistical analysis of SRAM cell stability
K Agarwal, S Nassif
Proceedings of the 43rd annual Design Automation Conference, 57-62, 2006
1842006
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
Y Liu, SR Nassif, LT Pileggi, AJ Strojwas
Proceedings of the 37th Annual Design Automation Conference, 168-171, 2000
1752000
Characterizing process variation in nanometer CMOS
K Agarwal, S Nassif
Proceedings of the 44th annual Design Automation Conference, 396-399, 2007
1722007
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