Post-placement power optimization with multi-bit flip-flops YT Chang, CC Hsu, MPH Lin, YW Tsai, SF Chen Proceedings of the International Conference on Computer-Aided Design, 218-223, 2010 | 104 | 2010 |
Analog placement based on symmetry-island formulation PH Lin, YW Chang, SC Lin IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 99 | 2009 |
Analog placement based on symmetry-island formulation PH Lin, YW Chang, SC Lin IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 99 | 2009 |
Analog layout synthesis: a survey of topological approaches HE Graeb Springer Science & Business Media, 2010 | 68 | 2010 |
Recent research development and new challenges in analog layout synthesis MPH Lin, YW Chang, CM Hung 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 617-622, 2016 | 66 | 2016 |
Common-centroid capacitor layout generation considering device matching and parasitic minimization MPH Lin, YT He, VWH Hsiao, RG Chang, SY Lee IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 57 | 2013 |
Thermal-driven analog placement considering device matching PH Lin, H Zhang, MDF Wong, YW Chang Proceedings of the 46th Annual Design Automation Conference, 593-598, 2009 | 53 | 2009 |
A novel analog physical synthesis methodology integrating existent design expertise PH Wu, MPH Lin, TC Chen, CF Yeh, X Li, TY Ho IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 51 | 2014 |
Analog placement based on hierarchical module clustering PH Lin, SC Lin Proceedings of the 45th annual Design Automation Conference, 50-55, 2008 | 51 | 2008 |
Analog placement based on novel symmetry-island formulation PH Lin, SC Lin Proceedings of the 44th annual Design Automation Conference, 465-470, 2007 | 47 | 2007 |
Electronic design automation for IC implementation, circuit design, and process technology: circuit design, and process technology L Lavagno, IL Markov, G Martin, LK Scheffer CRC Press, 2016 | 45 | 2016 |
Analog layout synthesis-Recent advances in topological approaches H Graeb, F Balasa, R Castro-López, YW Chang, FV Fernandez, PH Lin, ... 2009 Design, Automation & Test in Europe Conference & Exhibition, 274-279, 2009 | 40 | 2009 |
Post-placement power optimization with multi-bit flip-flops MPH Lin, CC Hsu, YT Chang IEEE transactions on computer-aided design of integrated circuits and …, 2011 | 37 | 2011 |
Analog and mixed signal IC layout system PH Lin, HC Yu, TH Tsai, SC Lin, SH Bai US Patent 7,739,646, 2010 | 37 | 2010 |
A matching-based placement and routing system for analog design PH Lin, HC Yu, TH Tsai, SC Lin 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 1-4, 2007 | 36 | 2007 |
Recent research in clock power saving with multi-bit flip-flops MPH Lin, CC Hsu, YT Chang 2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011 | 35 | 2011 |
Clock-tree aware multibit flip-flop generation during placement for power optimization MPH Lin, CC Hsu, YC Chen IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 33 | 2015 |
Exploring feasibilities of symmetry islands and monotonic current paths in slicing trees for analog placement PH Wu, MPH Lin, TC Chen, CF Yeh, TY Ho, BD Liu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 32 | 2014 |
Exploring feasibilities of symmetry islands and monotonic current paths in slicing trees for analog placement PH Wu, MPH Lin, TC Chen, CF Yeh, TY Ho, BD Liu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 32 | 2014 |
Efficient computation of ECO patch functions AQ Dao, NZ Lee, LC Chen, MPH Lin, JHR Jiang, A Mishchenko, ... Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 30 | 2018 |