Weidong Cao
Weidong Cao
Ph.D student of Electrical and System Engineering, Washington University in Saint.Louis
Verified email at wustl.edu - Homepage
Title
Cited by
Cited by
Year
NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion
W Cao, X He, A Chakrabarti, X Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019
52019
NeuADC: Neural Network-Inspired RRAM-Based Synthesizable Analog-to-Digital Conversion with Reconfigurable Quantization Support
W Cao, X He, A Chakrabarti, X Zhang
2019 Design, Automation and Test in Europe Conference, 2019
52019
A 40Gb/s 39mW 3-tap adaptive closed-loop decision feedback equalizer in 65nm CMOS
W Cao, Z Wang, D Li, X Zheng, F Li, C Zhang, Z Wang
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
3*2015
A 40Gb/s 27mW 3-tap closed-loop decision feedback equalizer in 65nm CMOS
W Cao, Z Wang, D Li, X Zheng, K Huang, S Yuan, F Li, Z Wang
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 1-4, 2015
32015
Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices
W Cao, L Ke, A Chakrabarti, X Zhang
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019
22019
A power scalable 2–10 Gb/s PI-based clock data recovery for multilane applications
F Lv, X Zheng, F Zhao, J Wang, S Yue, Z Wang, W Cao, Y He, C Zhang, ...
Microelectronics journal 82, 36-45, 2018
22018
A 28-Gb/s Transmitter with 3-tap FFE and T-coil Enhanced Terminal in 65-nm CMOS Technology
N Zhou, L Wu, Z Wang, X Zheng, W Cao, C Zhang, F Li, Z Wang
2016 14th IEEE International New Circuits and Systems Conference (NEWCAS), 1-4, 2016
22016
A 40Gb/s adaptive equalizer with amplitude approaching technique in 65nm CMOS
W Cao, Z Wang, D Li, F Li, Z Wang
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
22015
A 15Gb/s wireline repeater in 65nm CMOS technology
W Cao, X Zheng, Z Wang, D Li, F Li, S Yue, Z Wang
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
22015
Evaluating Neural Network-Inspired Analog-to-Digital Conversion with Low-Precision RRAM
W Cao, L Ke, A Chakrabarti, X Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
2020
A low power 3-tap decision feedback equalizer for the receiver of high-speed serial links
W Cao, Z Wang, S Yuan, K Huang, F Li
CA Patent CN105,187,342 B, 2018
2018
A dynamic latch with pull-up PMOS for high-speed circuit
W Cao, Z Wang, X Zheng, H Ke, F Li
CA Patent CN105,187,045 B, 2017
2017
Design and implementation of a 20GHz VCO
W Cao, C Hou, J Guo, Y Song, Z Wang, H Jiang, Z Wang
Microelectronics, 577-580, 2015
2015
11.4 Learning Gets Smarter
W Cao, X He, A Chakrabarti, X Zhang
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