Kourosh Gharachorloo
Kourosh Gharachorloo
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Title
Cited by
Cited by
Year
Memory consistency and event ordering in scalable shared-memory multiprocessors
K Gharachorloo, D Lenoski, J Laudon, P Gibbons, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 15-26, 1990
17431990
Shared memory consistency models: A tutorial
SV Adve, K Gharachorloo
computer 29 (12), 66-76, 1996
15361996
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
14381992
The stanford flash multiprocessor
J Kuskin, D Ofelt, M Heinrich, J Heinlein, R Simoni, K Gharachorloo, ...
Proceedings of 21 International Symposium on Computer Architecture, 302-313, 1994
10571994
The directory-based cache coherence protocol for the DASH multiprocessor
D Lenoski, J Laudon, K Gharachorloo, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 148-159, 1990
9731990
Piranha: A scalable architecture based on single-chip multiprocessing
LA Barroso, K Gharachorloo, R McNamara, A Nowatzyk, S Qadeer, ...
ACM SIGARCH Computer Architecture News 28 (2), 282-293, 2000
7612000
Memory system characterization of commercial workloads
LA Barroso, K Gharachorloo, E Bugnion
Proceedings. 25th Annual International Symposium on Computer Architecture …, 1998
5561998
Shasta: A low overhead, software-only approach for supporting fine-grain shared memory
DJ Scales, K Gharachorloo, CA Thekkath
Proceedings of the seventh international conference on Architectural support …, 1996
4641996
Performance evaluation of memory consistency models for shared-memory multiprocessors
K Gharachorloo, A Gupta, J Hennessy
ACM SIGPLAN Notices 26 (4), 245-257, 1991
3501991
Scalable architecture based on single-chip multiprocessing
LA Barroso, K Gharachorloo, A Nowatzyk
US Patent 6,668,308, 2003
3412003
Two techniques to enhance the performance of memory consistency models
K Gharachorloo, A Gupta, JL Hennessy
Computer Systems Laboratory, Stanford University, 1991
3311991
An analysis of database workload performance on simultaneous multithreaded processors
JL Lo, LA Barroso, SJ Eggers, K Gharachorloo, HM Levy, SS Parekh
Proceedings. 25th Annual International Symposium on Computer Architecture …, 1998
3081998
Comparative evaluation of latency reducing and tolerating techniques
A Gupta, J Hennessy, K Gharachorloo, T Mowry, WD Weber
Proceedings of the 18th Annual International Symposium on Computer …, 1991
2961991
Method for sharing variable-grained memory of workstations by sending particular block including line and size of the block to exchange shared data structures
DJ Scales, K Gharachorloo
US Patent 5,933,598, 1999
248*1999
Performance of database workloads on shared-memory systems with out-of-order processors
P Ranganathan, K Gharachorloo, SV Adve, LA Barroso
Proceedings of the eighth international conference on Architectural support …, 1998
2381998
Memory consistency models for shared-memory multiprocessors
K Gharachorloo
Stanford University, 1996
2011996
The performance impact of flexibility in the Stanford FLASH multiprocessor
M Heinrich, J Kuskin, D Ofelt, J Heinlein, J Baxter, JP Singh, R Simoni, ...
Proceedings of the sixth international conference on Architectural support …, 1994
1871994
Architecture and design of AlphaServer GS320
K Gharachorloo, M Sharma, S Steely, S Van Doren
ACM Sigplan Notices 35 (11), 13-24, 2000
1852000
Integration of message passing and shared memory in the Stanford FLASH multiprocessor
J Heinlein, K Gharachorloo, S Dresser, A Gupta
ACM SIGPLAN Notices 29 (11), 38-50, 1994
1601994
Method and system for exclusive two-level caching in a chip-multiprocessor
LA Barroso, K Gharachorloo, A Nowatzyk
US Patent 6,725,334, 2004
1462004
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