JoAnn M. Paul
JoAnn M. Paul
Associate Professor of Electrical and Computer Engineering, Virginia Tech
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Cited by
Cited by
Undergraduate embedded system education at Carnegie Mellon
P Koopman, H Choset, R Gandhi, B Krogh, D Marculescu, P Narasimhan, ...
ACM Transactions on Embedded Computing Systems (TECS) 4 (3), 500-528, 2005
What's in a Name
JAM Paul
IEEE Computer 39 (3), 87-89, 2006
Scenario-Oriented Design for Single Chip Heterogeneous Multiprocessors
JAM Paul
Next Generation Software Workshop, IPDPS, 2005
High level cache simulation for heterogeneous multiprocessors
JJ Pieper, A Mellan, JAM Paul, DE Thomas, F Karim
Proceedings of the 41st annual Design Automation Conference, 287-292, 2004
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors
JM Paul, DE Thomas, AS Cassidy
ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (3 …, 2005
Power-performance simulation and design strategies for single-chip heterogeneous multiprocessors
BH Meyer, JJ Pieper, JAM Paul, JE Nelson, SM Pieper, AG Rowe
IEEE transactions on Computers 54 (6), 684-697, 2005
Amdahl’s law revisited for single chip systems
JAM Paul, BH Meyer
International Journal of Parallel Programming 35 (2), 101-123, 2007
Modeling shared resource contention using a hybrid simulation/analytical approach
A Bobrek, JJ Pieper, JE Nelson, JAM Paul, DE Thomas
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
A new era of performance evaluation
SM Pieper, JAM Paul, MJ Schulte
Computer 40 (9), 23-30, 2007
Layered, multi-threaded, high-level performance design
AS Cassidy, JAM Paul, DE Thomas
2003 Design, Automation and Test in Europe Conference and Exhibition, 954-959, 2003
Schedulers as model-based design elements in programmable heterogeneous multiprocessors
JAM Paul, A Bobrek, JE Nelson, JJ Pieper, DE Thomas
Proceedings 2003. Design Automation Conference (IEEE Cat. No. 03CH37451 …, 2003
A layered, codesign virtual machine approach to modeling computer systems
JM Paul, DE Thomas
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
Programmers' views of SoCs
JAM Paul
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
Stochastic contention level simulation for single-chip heterogeneous multiprocessors
A Bobrek, JAM Paul, DE Thomas
IEEE Transactions on Computers 59 (10), 1402-1418, 2010
Benchmark-based design strategies for single chip heterogeneous multiprocessors
JAM Paul, DE Thomas, A Bobrek
International Conference on Hardware/Software Codesign and System Synthesis …, 2004
Shared resource access attributes for high-level contention models
A Bobrek, JAM Paul, DE Thomas
2007 44th ACM/IEEE Design Automation Conference, 720-725, 2007
Models of Computation for Systems-on-Chips
JM Paul, DE Thomas
Multiprocessor Systems-on-Chips, 2004
Response of annual medics (Medicago ssp.) and field peas (Pisum sativum) to high concentrations of boron: Genetic variation and mechanism of tolerance
JG Paul, RO Nable, AWH Lake, MA Materne, AJ Rathjen
Aust. J. Agric. Res 43, 203-213, 1992
Interrupt modeling for efficient high-level scheduler design space exploration
FR Johnson, JM Paul
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (1 …, 2008
Workload mode identification for chip heterogeneous multiprocessors
M Otoom, JAM Paul
International Journal of Parallel Programming 40 (2), 184-224, 2012
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