| Fast and reconfigurable packet classification engine in FPGA-based firewall A Wicaksana, A Sasongko Proceedings of the 2011 International Conference on Electrical Engineering …, 2011 | 24 | 2011 |
| On-board non-regression test of HLS tools targeting FPGA A Wicaksana, A Prost-Boucle, O Muller, F Rousseau, A Sasongko Proceedings of the 27th International Symposium on Rapid System Prototyping …, 2016 | 6 | 2016 |
| Prototyping dynamic task migration on heterogeneous reconfigurable systems A Wicaksana, A Bourge, O Muller, A Sasongko, F Rousseau Proceedings of the 28th International Symposium on Rapid System Prototyping …, 2017 | 5 | 2017 |
| Demonstration of a context-switch method for heterogeneous reconfigurable systems A Wicaksana, A Bourge, O Muller, F Rousseau 2016 26th International Conference on Field Programmable Logic and …, 2016 | 5 | 2016 |
| Cross-level co-simulation and verification of an automatic transmission control on embedded processor C Bernardeschi, A Domenici, M Palmieri, S Saponara, T Sassolas, ... Software Engineering and Formal Methods. SEFM 2020 Collocated Workshops …, 2021 | 4 | 2021 |
| Hybrid prototyping methodology for rapid system validation in HW/SW co-design A Wicaksana, A Charif, C Andriamisaina, N Ventroux 2019 Conference on Design and Architectures for Signal and Image Processing …, 2019 | 4 | 2019 |
| Hardware context switch-based cryptographic accelerator for handling multiple streams A Sasongko, IMN Kumara, A Wicaksana, F Rousseau, O Muller ACM Transactions on Reconfigurable Technology and Systems (TRETS) 14 (3), 1-25, 2021 | 2 | 2021 |
| Validation automatique d’une methode de migration des tâches sur la plateforme Zynq.’ A Wicaksana, O Muller, A Sasongko, F Rousseau Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM …, 0 | 2 | |
| Maintaining Communication Consistency During Task Migrations in Heterogeneous Reconfigurable Devices A Wicaksana, O Muller, F Rousseau, A Sasongko Multi-Processor System-on-Chip 1: Architectures, 255-285, 2021 | 1 | 2021 |
| Decoupling processor and memory hierarchy simulators for efficient design space exploration F Jebali, O Matoussi, A Wicaksana, A Charif, L Zaourar System Engineering for constrained embedded systems, 47-52, 2022 | | 2022 |
| SESAM: A Comprehensive Framework for Cyber–Physical System Prototyping A Charif, N VENTROUX Multi-Processor System-on-Chip 2: Applications, 137, 2021 | | 2021 |
| Portable infrastructure for heterogeneous reconfigurable devices in a cloud-FPGA environment A Wicaksana Université Grenoble Alpes, 2018 | | 2018 |
| Infrastructure portable pour un système hétérogène reconfigurable dans un environnement de cloud-FPGA A Wicaksana Université Grenoble Alpes (ComUE), 2018 | | 2018 |
| Validation automatique d’une méthode de migration des tâches sur la plateforme Zynq O Muller, A Sasongko, F Rousseau, A Wicaksana Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRD'16), 2016 | | 2016 |
| Cross-level Co-simulation and Verification of an Automatic Transmission Control on Embedded Processor S Saponara, T Sassolas, A Wicaksana, L Zaourar Software Engineering and Formal Methods, 263, 0 | | |
Frederic Rousseauprofessor in computer science, Université Grenoble-AlpesVerified email at univ-grenoble-alpes.fr
