Jorge Albericio
Jorge Albericio
Verified email at nvidia.com
Title
Cited by
Cited by
Year
Cnvlutin: Ineffectual-neuron-free deep neural network computing
J Albericio, P Judd, T Hetherington, T Aamodt, NE Jerger, A Moshovos
ACM SIGARCH Computer Architecture News 44 (3), 1-13, 2016
5352016
Stripes: Bit-serial deep neural network computing
P Judd, J Albericio, T Hetherington, TM Aamodt, A Moshovos
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
2842016
Bit-pragmatic deep neural network computing
J Albericio, A Delmás, P Judd, S Sharify, G O'Leary, R Genov, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
1362017
Doppelgänger: a cache for approximate computing
JS Miguel, J Albericio, A Moshovos, NE Jerger
Proceedings of the 48th International Symposium on Microarchitecture, 50-61, 2015
1142015
Reduced-precision strategies for bounded memory in deep neural nets
P Judd, J Albericio, T Hetherington, T Aamodt, NE Jerger, R Urtasun, ...
arXiv preprint arXiv:1511.05236, 2015
1002015
Proteus: Exploiting numerical precision variability in deep neural networks
P Judd, J Albericio, T Hetherington, TM Aamodt, NE Jerger, A Moshovos
Proceedings of the 2016 International Conference on Supercomputing, 1-12, 2016
792016
The reuse cache: Downsizing the shared last-level cache
J Albericio, P Ibáñez, V Viñals, JM Llabería
2013 46th Annual IEEE/ACM International Symposium on Microarchitecture …, 2013
622013
The bunker cache for spatio-value approximation
J San Miguel, J Albericio, NE Jerger, A Jaleel
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
472016
Exploiting reuse locality on inclusive shared last-level caches
J Albericio, P Ibánez, V Viñals, JM Llabería
ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-19, 2013
232013
The inner most loop iteration counter: a new dimension in branch history
A Seznec, J San Miguel, J Albericio
2015 48th Annual IEEE/ACM International Symposium on Microarchitecture …, 2015
202015
Wormhole: Wisely predicting multidimensional branches
J Albericio, J San Miguel, NE Jerger, A Moshovos
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 509-520, 2014
152014
ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache
J Albericio, R Gran, P Ibánez, V Viñals, JM Llabería
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012
132012
Proteus: Exploiting precision variability in deep neural networks
P Judd, J Albericio, T Hetherington, T Aamodt, NE Jerger, R Urtasun, ...
Parallel Computing 73, 40-51, 2018
122018
Evaluating the memory system behavior of smartphone workloads
G Narancic, P Judd, D Wu, I Atta, M Elnacouzi, J Zebchuk, J Albericio, ...
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
112014
Accelerator for deep neural networks
P Judd, J Albericio, AD Lascorz, A Moshovos, S Sharify
US Patent 10,387,771, 2019
82019
Value-based deep-learning acceleration
A Moshovos, J Albericio, P Judd, AD Lascorz, S Sharify, T Hetherington, ...
IEEE Micro 38 (1), 41-55, 2018
62018
Exploiting Typical Values to Accelerate Deep Learning
A Moshovos, J Albericio, P Judd, AD Lascorz, S Sharify, Z Poulos, ...
Computer 51 (5), 18-30, 2018
52018
Wormhole branch prediction using multidimensional histories
J Albericio, J San Miguel, NE Jerger, A Moshovos
JWAC-4: Championship Branch Prediction, 2014
52014
Accelerator for deep neural networks
P Judd, J Albericio, AD Lascorz, A Moshovos, S Sharify
US Patent App. 16/314,422, 2019
32019
Practical multidimensional branch prediction
A Seznec, J San Miguel, J Albericio
IEEE Micro 36 (3), 10-19, 2016
32016
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Articles 1–20