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Victor Lomné
Victor Lomné
NinjaLab
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Title
Cited by
Cited by
Year
Fault attacks on AES with faulty ciphertexts only
T Fuhr, É Jaulmes, V Lomné, A Thillard
2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 108-118, 2013
2172013
Combined fault and side-channel attack on protected implementations of AES
T Roche, V Lomné, K Khalfallah
Smart Card Research and Advanced Applications: 10th IFIP WG 8.8/11.2 …, 2011
1072011
On the need of randomness in fault attack countermeasures-application to AES
V Lomné, T Roche, A Thillard
2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 85-94, 2012
1022012
How to estimate the success rate of higher-order side-channel attacks
V Lomné, E Prouff, M Rivain, T Roche, A Thillard
Cryptographic Hardware and Embedded Systems–CHES 2014: 16th International …, 2014
862014
Statistical fault attacks on nonce-based authenticated encryption schemes
C Dobraunig, M Eichlseder, T Korak, V Lomné, F Mendel
Advances in Cryptology–ASIACRYPT 2016: 22nd International Conference on the …, 2016
812016
Behind the scene of side channel attacks
V Lomné, E Prouff, T Roche
International conference on the theory and application of cryptology and …, 2013
692013
Implementing lightweight block ciphers on x86 architectures
R Benadjila, J Guo, V Lomné, T Peyrin
International Conference on Selected Areas in Cryptography, 324-351, 2013
552013
Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest
C Clavier, JL Danger, G Duc, MA Elaabid, B Gérard, S Guilley, A Heuser, ...
Journal of Cryptographic Engineering 4, 259-274, 2014
482014
Evaluating the robustness of secure triple track logic through prototyping
R Soares, N Calazans, V Lomné, P Maurine, L Torres, M Robert
Proceedings of the 21st annual symposium on Integrated circuits and system …, 2008
402008
A side journey to titan
T Roche, V Lomné, C Mutschler, L Imbert
30th USENIX Security Symposium (USENIX Security 21), 231-248, 2021
372021
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
V Lomné, P Maurine, L Torres, M Robert, R Soares, N Calazans
2009 Design, Automation & Test in Europe Conference & Exhibition, 634-639, 2009
332009
Formal framework for the evaluation of waveform resynchronization algorithms
S Guilley, K Khalfallah, V Lomne, JL Danger
IFIP International Workshop on Information Security Theory and Practices …, 2011
322011
Side-channel attack against RSA key generation algorithms
A Bauer, E Jaulmes, V Lomné, E Prouff, T Roche
International Workshop on Cryptographic Hardware and Embedded Systems, 223-241, 2014
242014
Enhancing electromagnetic attacks using spectral coherence based cartography
A Dehbaoui, V Lomne, P Maurine, L Torres, M Robert
VLSI-SoC: Technologies for Systems Integration: 17th IFIP WG 10.5/IEEE …, 2011
232011
A Side Journey to Titan.
V Lomne, T Roche
IACR Cryptol. ePrint Arch. 2021, 28, 2021
212021
Modeling time domain magnetic emissions of ICs
V Lomné, P Maurine, L Torres, T Ordas, M Lisart, J Toublanc
Integrated Circuit and System Design. Power and Timing Modeling …, 2011
212011
Side channel attacks
V Lomne, A Dehaboui, P Maurine, L Torres, M Robert
Security Trends for FPGAS: From Secured to Secure Reconfigurable Systems, 47-72, 2011
182011
Collision-Correlation Attack against Some 1st-Order Boolean Masking Schemes in the Context of Secure Devices
T Roche, V Lomné
Constructive Side-Channel Analysis and Secure Design: 4th International …, 2013
162013
Side-channel attacks on blinded scalar multiplications revisited
T Roche, L Imbert, V Lomné
Smart Card Research and Advanced Applications: 18th International Conference …, 2020
132020
Cost-effective design strategies for securing embedded processors
F Bruguier, P Benoit, L Torres, L Barthe, M Bourree, V Lomne
IEEE Transactions on Emerging Topics in Computing 4 (1), 60-72, 2015
132015
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