Victor LomnÚ
Victor LomnÚ
NinjaLab
Verified email at ninjalab.io - Homepage
Title
Cited by
Cited by
Year
Fault attacks on AES with faulty ciphertexts only
T Fuhr, E Jaulmes, V LomnÚ, A Thillard
2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 108-118, 2013
1152013
Combined fault and side-channel attack on protected implementations of aes
T Roche, V LomnÚ, K Khalfallah
International Conference on Smart Card Research and Advanced Applications, 65-83, 2011
802011
On the need of randomness in fault attack countermeasures-application to AES
V LomnÚ, T Roche, A Thillard
2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 85-94, 2012
772012
How to estimate the success rate of higher-order side-channel attacks
V LomnÚ, E Prouff, M Rivain, T Roche, A Thillard
International Workshop on Cryptographic Hardware and Embedded Systems, 35-54, 2014
602014
Behind the scene of side channel attacks
V LomnÚ, E Prouff, T Roche
International Conference on the Theory and Application of Cryptology andá…, 2013
522013
Statistical fault attacks on nonce-based authenticated encryption schemes
C Dobraunig, M Eichlseder, T Korak, V LomnÚ, F Mendel
International Conference on the Theory and Application of Cryptology andá…, 2016
472016
Implementing lightweight block ciphers on x86 architectures
R Benadjila, J Guo, V LomnÚ, T Peyrin
International Conference on Selected Areas in Cryptography, 324-351, 2013
362013
Evaluating the robustness of secure triple track logic through prototyping
R Soares, N Calazans, V LomnÚ, P Maurine, L Torres, M Robert
Proceedings of the 21st annual symposium on Integrated circuits and systemá…, 2008
352008
Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest
C Clavier, JL Danger, G Duc, MA Elaabid, B GÚrard, S Guilley, A Heuser, ...
Journal of Cryptographic Engineering 4 (4), 259-274, 2014
302014
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
V LomnÚ, P Maurine, L Torres, M Robert, R Soares, N Calazans
2009 Design, Automation & Test in Europe Conference & Exhibition, 634-639, 2009
282009
Formal framework for the evaluation of waveform resynchronization algorithms
S Guilley, K Khalfallah, V LomnÚ, JL Danger
IFIP International Workshop on Information Security Theory and Practicesá…, 2011
252011
Enhancing electromagnetic attacks using spectral coherence based cartography
A Dehbaoui, V Lomne, P Maurine, L Torres, M Robert
IFIP/IEEE International Conference on Very Large Scale Integration-System oná…, 2009
182009
Side-channel attack against RSA key generation algorithms
A Bauer, E Jaulmes, V LomnÚ, E Prouff, T Roche
International Workshop on Cryptographic Hardware and Embedded Systems, 223-241, 2014
142014
Side channel attacks
V Lomne, A Dehaboui, P Maurine, L Torres, M Robert
Security trends for FPGAS, 47-72, 2011
142011
Collision-Correlation Attack against Some 1st-Order Boolean Masking Schemes in the Context of Secure Devices
T Roche, V LomnÚ
International Workshop on Constructive Side-Channel Analysis and Secureá…, 2013
132013
Magnitude squared incoherence EM analysis for integrated cryptographic module localisation
A Dehbaoui, V Lomne, P Maurine, L Torres
Electronics letters 45 (15), 778-780, 2009
102009
Enhancing electromagnetic analysis using magnitude squared incoherence
A Dehbaoui, V LomnÚ, T Ordas, L Torres, M Robert, P Maurine
IEEE transactions on very large scale integration (VLSI) systems 20 (3), 573-577, 2011
82011
Cost-effective design strategies for securing embedded processors
F Bruguier, P Benoit, L Torres, L Barthe, M Bourree, V Lomne
IEEE Transactions on Emerging Topics in Computing 4 (1), 60-72, 2015
62015
Modeling time domain magnetic emissions of ICs
V LomnÚ, P Maurine, L Torres, T Ordas, M Lisart, J Toublanc
International Workshop on Power and Timing Modeling, Optimization andá…, 2010
62010
Modeling time domain magnetic emissions of ICs
V LomnÚ, P Maurine, L Torres, T Ordas, M Lisart, J Toublanc
International Workshop on Power and Timing Modeling, Optimization andá…, 2010
62010
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