| Multiprocessor system-on-chip (MPSoC) technology W Wolf, AA Jerraya, G Martin IEEE transactions on computer-aided design of integrated circuits and …, 2008 | 673 | 2008 |
| Multiprocessor systems-on-chips A Jerraya, W Wolf Elsevier, 2004 | 635 | 2004 |
| Component-based design approach for multicore SoCs W Cesario, A Baghdadi, L Gauthier, D Lyonnard, G Nicolescu, Y Paviot, ... Proceedings of the 39th annual Design Automation Conference, 789-794, 2002 | 252 | 2002 |
| Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip D Lyonnard, S Yoo, A Baghdadi, AA Jerraya Proceedings of the 38th annual Design Automation Conference, 518-523, 2001 | 223 | 2001 |
| Multiprocessor SoC platforms: a component-based design approach WO Cesário, D Lyonnard, G Nicolescu, Y Paviot, S Yoo, AA Jerraya, ... IEEE Design & Test of Computers 19 (6), 52-63, 2002 | 204 | 2002 |
| Hardware/software interface codesign for embedded systems AA Jerraya, W Wolf Computer 38 (2), 63-69, 2005 | 187 | 2005 |
| Automatic generation and targeting of application-specific operating systems and embedded systems software L Gauthier, S Yoo, AA Jerraya IEEE transactions on computer-aided design of integrated circuits and …, 2001 | 168 | 2001 |
| Synthesis steps and design models for codesign TB Ismail, AA Jerraya Computer 28 (2), 44-53, 1995 | 142 | 1995 |
| Behavioral synthesis and component reuse with VHDL AA Jerraya Springer Science & Business Media, 1997 | 138 | 1997 |
| Protocol selection and interface generation for HW-SW codesign JM Daveau, GF Marchioro, T Ben-Ismail, AA Jerraya IEEE transactions on very large scale integration (VLSI) systems 5 (1), 136-144, 1997 | 123 | 1997 |
| Programming models and HW-SW interfaces abstraction for multi-processor SoC AA Jerraya, A Bouchhima, F Pétrot Proceedings of the 43rd annual Design Automation Conference, 280-285, 2006 | 115 | 2006 |
| COSMOS: a codesign approach for communicating systems TB Ismail, M Abid, A Jerraya Third International Workshop on Hardware/Software Codesign, 17-24, 1994 | 113 | 1994 |
| Automatic generation of fast timed simulation models for operating systems in SoC design S Yoo, G Nicolescu, L Gauthier, AA Jerraya Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 102 | 2002 |
| Synthesis of system-level communication by an allocation-based approach JM Daveau, TB Ismail, AA Jerraya Proceedings of the 8th international symposium on System synthesis, 150-155, 1995 | 102 | 1995 |
| An optimal memory allocation for application-specific multiprocessor system-on-chip S Meftali, F Gharsalli, F Rousseau, AA Jerraya Proceedings of the 14th international symposium on Systems synthesis, 19-24, 2001 | 92 | 2001 |
| Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures P Gerin, S Yoo, G Nicolescu, AA Jerraya Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 92 | 2001 |
| Address calculation for retargetable compilation and exploration of instruction-set architectures C Liem, P Paulin, A Jerraya Proceedings of the 33rd annual Design Automation Conference, 597-600, 1996 | 91 | 1996 |
| SOLAR: An intermediate format for system-level modeling and synthesis AA Jerraya, K O’Brien Computer Aided Software/Hardware Engineering, 147-175, 1994 | 90 | 1994 |
| SHAPES: a tiled scalable software hardware architecture platform for embedded systems PS Paolucci, AA Jerraya, R Leupers, L Thiele, P Vicini Proceedings of the 4th international conference on Hardware/software …, 2006 | 86 | 2006 |
| Introduction to hardware abstraction layers for SoC S Yoo, AA Jerraya Embedded software for SoC, 179-186, 2003 | 84 | 2003 |
