Debora Matos
Title
Cited by
Cited by
Year
Reconfigurable routers for low power and high performance
D Matos, C Concatto, M Kreutz, F Kastensmidt, L Carro, A Susin
IEEE Transactions on very large scale integration (VLSI) systems 19 (11 …, 2010
502010
A new reconfigurable clock-gating technique for low power SRAM-based FPGAs
L Sterpone, L Carro, D Matos, S Wong, F Fakhar
2011 Design, Automation & Test in Europe, 1-6, 2011
302011
Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router
C Concatto, D Matos, L Carro, F Kastensmidt, A Susin, E Cota, M Kreutz
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System …, 2009
212009
Noc power optimization using a reconfigurable router
C Concatto, D Matos, L Carro, F Kastensmidt, A Susin, M Kreutz
2009 IEEE Computer Society Annual Symposium on VLSI, 235-240, 2009
212009
Adaptive router architecture based on traffic behavior observability
D Matos, C Concatto, A Kologeski, L Carro, F Kastensmidt, A Susin, ...
2009 2nd International Workshop on Network on Chip Architectures, 17-22, 2009
162009
Performance evaluation of hierarchical NoC topologies for stacked 3D ICs
D Matos, M Prass, M Kreutz, L Carro, A Susin
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1961-1964, 2015
142015
Network interface to synchronize multiple packets on NoC-based systems-on-chip
D Matos, M Costa, L Carro, A Susin
2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 31-36, 2010
142010
Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip
D Matos, G Palermo, V Zaccaria, C Reinbrecht, A Susin, C Silvano, ...
Proceedings of the 4th International Workshop on Network on Chip …, 2011
132011
ERA–Embedded Reconfigurable Architectures
S Wong, L Carro, M Rutzig, DM Matos, R Giorgi, N Puzovic, S Kaxiras, ...
Reconfigurable Computing, 239-259, 2011
102011
Combining fault tolerance and serialization effort to improve yield in 3D networks-on-chip
A Kologeski, C Concatto, D Matos, D Grehs, T Motta, F Almeida, ...
2013 IEEE 20th International Conference on Electronics, Circuits, and …, 2013
92013
Floorplan-aware hierarchical NoC topology with GALS interfaces
D Matos, C Reinbrecht, G Palermo, J Martinelli, A Susin, C Silvano, ...
2012 IEEE International Symposium on Circuits and Systems (ISCAS), 652-655, 2012
72012
A NOC closed-loop performance monitor and adapter
D Matos, C Concatto, A Kologeski, L Carro, M Kreutz, F Kastensmidt, ...
Microprocessors and Microsystems 37 (6-7), 661-671, 2013
62013
Monitor-adapter coupling for NOC performance tuning
D Matos, C Concatto, A Kologeski, L Carro, F Kastensmidt, A Susin, ...
2010 International Conference on Embedded Computer Systems: Architectures …, 2010
62010
Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs
D Matos, L Carro, A Susin
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
62010
The need for reconfigurable routers in Networks-on-Chip
D Matos, C Concatto, L Carro, F Kastensmidt, A Susin
International Workshop on Applied Reconfigurable Computing, 275-280, 2009
62009
A fully dynamic reconfigurable noc-based mpsoc: The advantages of total reconfiguration
PC Santos, GL Nazar, F Anjam, S Wong, D Matos, L Carro
7th HiPEAC Workshop on Reconfigurable Computing, Berlin, Germany, 2013
52013
Architectural exploration of last-level caches targeting homogeneous multicore systems
R Cataldo, G Korol, R Fernandes, D Matos, C Marcon
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
42016
Revising the annotation of a Broadcast News corpus: a linguistic approach
V Cabarrão, H Moniz, F Batista, R Ribeiro, N Mamede, H Meinedo, ...
Proceedings of the Ninth International Conference on Language Resources and …, 2014
42014
A power-efficient hierarchical network-on-chip topology for stacked 3D ICs
D Matos, C Reinbrecht, T Motta, A Susin
2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013
42013
Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark
R Cataldo, G Korol, R Fernandes, G Sanchez, D Matos, C Marcon
2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016
32016
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