| First demonstration of a logic-process compatible junctionless ferroelectric FinFET synapse for neuromorphic applications M Seo, MH Kang, SB Jeon, H Bae, J Hur, BC Jang, S Yun, S Cho, WK Kim, ... IEEE Electron Device Letters 39 (9), 1445-1448, 2018 | 141 | 2018 |
| Mimicry of excitatory and inhibitory artificial neuron with leaky integrate-and-fire function by a single MOSFET JK Han, M Seo, WK Kim, MS Kim, SY Kim, MS Kim, GJ Yun, GB Lee, ... IEEE Electron Device Letters 41 (2), 208-211, 2019 | 70 | 2019 |
| Impact of SiGe layer thickness in starting substrates on strained Ge-on-insulator pMOSFETs fabricated by Ge condensation method KW Jo, WK Kim, M Takenaka, S Takagi Applied Physics Letters 114 (6), 2019 | 28 | 2019 |
| Sb-doped S/D ultrathin body Ge-On insulator nMOSFET fabricated by improved Ge condensation process WK Kim, K Kuroda, M Takenaka, S Takagi IEEE Transactions on Electron Devices 61 (10), 3379-3385, 2014 | 22 | 2014 |
| A comprehensive study of a single-transistor latch in vertical pillar-type FETs with asymmetric source and drain SW Lee, SY Kim, KM Hwang, IK Jin, J Hur, DH Kim, JW Son, WK Kim, ... IEEE Transactions on Electron Devices 65 (11), 5208-5212, 2018 | 11 | 2018 |
| Vertical InGaAs biristor for sub-1 V operation WK Kim, P Bidenko, J Kim, J Sim, JK Han, S Kim, DM Geum, S Kim, ... IEEE Electron Device Letters 42 (5), 681-683, 2021 | 10 | 2021 |
| Multilevel States of Nano‐Electromechanical Switch for a PUF‐Based Security Device KM Hwang, WK Kim, IK Jin, SW Lee, YK Choi Small 15 (3), 1803825, 2019 | 10 | 2019 |
| A study of high-temperature effects on an asymmetrically doped vertical pillar-type field-effect transistor JK Han, J Hur, WK Kim, JY Park, SW Lee, SY Kim, JM Yu, YK Choi IEEE Transactions on Nanotechnology 19, 52-55, 2019 | 9 | 2019 |
| Hole mobility enhancement in extremely-thin-body strained GOI and SGOI pMOSFETs by improved Ge condensation method KW Jo, WK Kim, M Takenaka, S Takagi 2018 IEEE Symposium on VLSI Technology, 195-196, 2018 | 9 | 2018 |
| High performance 4.5-nm-thick compressively-strained Ge-on-insulator pMOSFETs fabricated by Ge condensation with optimized temperature control WK Kim, M Takenaka, S Takagi 2017 Symposium on VLSI Technology, T124-T125, 2017 | 9 | 2017 |
| Ultrathin-Body Ge-on-Insulator Mosfet and TFET Technologies S Takagi, WK Kim, KW Jo, R Matsumura, R Takaguchi, T Katoh, TE Bae, ... ECS Transactions 86 (7), 75, 2018 | 7 | 2018 |
| Electro-Thermal Erasing at 104-Fold Faster Speeds in Charge-Trap Flash Memory MS Kim, DC Ahn, JY Park, M Seo, SY Kim, WK Kim, DH Yun, YK Choi IEEE Electron Device Letters 40 (2), 196-199, 2018 | 6 | 2018 |
| Properties of ultrathin-body condensation Ge-on-insulator films thinned by additional thermal oxidation WK Kim, M Takenaka, S Takagi Japanese Journal of Applied Physics 54 (4S), 04DA05, 2015 | 6 | 2015 |
| A strategy for optimizing low operating voltage in a silicon biristor JW Son, J Hur, WK Kim, GB Lee, YK Choi IEEE Transactions on Nanotechnology 19, 5-10, 2019 | 4 | 2019 |
| MOS device technology using alternative channel materials for low power logic LSI S Takagi, KKWK Kim, K Jo, R Matsumura, R Takaguchi, DH Ahn, T Gotow, ... 2018 48th European Solid-State Device Research Conference (ESSDERC), 6-11, 2018 | 2 | 2018 |
| A Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET MS Kim, GJ Yun, WK Kim, M Seo, DJ Kim, JM Yu, JK Han, J Hur, GB Lee, ... IEEE Electron Device Letters 43 (4), 521-524, 2022 | 1 | 2022 |
| Physical Unclonable Function: Multilevel States of Nano‐Electromechanical Switch for a PUF‐Based Security Device (Small 3/2019) KM Hwang, WK Kim, IK Jin, SW Lee, YK Choi Small 15 (3), 1970015, 2019 | | 2019 |
| Effects of Post Metal and Forming Gas Annealing on Characteristics of Ferroelectric FinFETs with HfZrOX Gate Dielectric MS Seo, MH Kang, WK Kim, J Hur, SJ Yun, H Kim, SB Hong, YK Choi 2018 MRS Fall Meeting & Exhibit, 2018 | | 2018 |
| Study on performance enhancement of ultra-thin-body Ge-on-Insulator pMOSFETs by Ge condensation method WK Kim UNIVERSITY OF TOKYO, 2017 | | 2017 |
| Ultra-thin body MOS device technologies using high mobility channel materials S Takagi, SH Kim, M Yokoyama, WK Kim, R Zhang, M Takenaka 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2013 | | 2013 |
Shinichi TakagiThe University of TokyoVerified email at ee.t.u-tokyo.ac.jp
Shinichi TakagiThe University of TokyoVerified email at ee.t.u-tokyo.ac.jp