Saied Hemati
Saied Hemati
Associate Professor, Electrical Engineering Department, Linköping University
Verified email at liu.se - Homepage
TitleCited byYear
Majority-based tracking forecast memories for stochastic LDPC decoding
SS Tehrani, A Naderi, GA Kamendje, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Signal Processing 58 (9), 4883-4896, 2010
1182010
Improving belief propagation on graphs with cycles
MR Yazdani, S Hemati, AH Banihashemi
IEEE Communications Letters 8 (1), 57-59, 2004
1022004
A 0.18μm Analog Min-Sum Iterative Decoder for a (32,8) Low-Density Parity-Check (LDPC) Code
S Hemati, AH Banihashemi, C Plett
Solid-State Circuits, IEEE Journal of 41 (11), 2531-2540, 2006
79*2006
Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes
S Hemati, AH Banihashemi
IEEE Transactions on Communications 54 (1), 61-70, 2006
662006
Stochastic decoding of LDPC codes over GF (q)
G Sarkis, S Mannor, WJ Gross
2009 IEEE International Conference on Communications, 1-5, 2009
52*2009
A differential binary message-passing LDPC decoder
N Mobini, AH Banihashemi, S Hemati
IEEE Transactions on Communications 57 (9), 2518-2523, 2009
482009
Method and system for decoding
W Gross, S Hemati, S Mannor, A Naderi, F Leduc-Primeau
US Patent 8,677,227, 2014
432014
Iterative decoding in analog CMOS
S Hemati, AH Banihashemi
Proceedings of the 13th ACM Great Lakes symposium on VLSI, 15-20, 2003
372003
High-throughput energy-efficient LDPC decoders using differential binary message passing
K Cushon, S Hemati, C Leroux, S Mannor, WJ Gross
IEEE Transactions on Signal Processing 62 (3), 619-631, 2013
352013
Dithered belief propagation decoding
F Leduc-Primeau, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Communications 60 (8), 2042-2047, 2012
292012
Method and system for decoding
W Gross, F Leduc-Primeau, S Hemati, S Mannor
US Patent 8,898,537, 2014
282014
Adaptive multiset stochastic decoding of non-binary LDPC codes
A Ciobanu, S Hemati, WJ Gross
IEEE Transactions on Signal Processing 61 (16), 4100-4113, 2013
212013
A min-sum iterative decoder based on pulsewidth message encoding
K Cushon, C Leroux, S Hemati, S Mannor, WJ Gross
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (11), 893-897, 2010
212010
A relaxed half-stochastic iterative decoder for LDPC codes
F Leduc-Primeau, S Hemati, WJ Gross, S Mannor
GLOBECOM 2009-2009 IEEE Global Telecommunications Conference, 1-6, 2009
202009
Full CMOS min-sum analog iterative decoder
S Hemati, A Banihashemi
202003
Comparison between continuous-time asynchronous and discrete-time synchronous iterative decoding
S Hemati, AH Banihashemi
IEEE Global Telecommunications Conference, 2004. GLOBECOM'04. 1, 356-360, 2004
182004
An 80-Mb/s 0.18-/spl mu/m CMOS analog min-sum iterative decoder for a (32, 8, 10) LDPC code
S Hemati, AH Banihashemi, C Plett
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005 …, 2005
162005
Stochastic chase decoding of Reed-Solomon codes
C Leroux, S Hemati, S Mannor, WJ Gross
IEEE Communications Letters 14 (9), 863-865, 2010
142010
Full CMOS min-sum analog iterative decoders
A Banihashemi, S Hemati
US Patent 7,769,798, 2010
142010
Iterative decoding in analog VLSI
S Hemati
Carleton University, 2005
142005
The system can't perform the operation now. Try again later.
Articles 1–20