Milad Hashemi
Milad Hashemi
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Cited by
Cited by
Morphcore: An energy-efficient microarchitecture for high performance ilp and high throughput tlp
MA Suleman, M Hashemi, C Wilkerson, YN Patt
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 305-316, 2012
Learning memory access patterns
M Hashemi, K Swersky, JA Smith, G Ayers, H Litz, J Chang, C Kozyrakis, ...
arXiv preprint arXiv:1803.02329, 2018
Accelerating dependent cache misses with an enhanced memory controller
M Hashemi, E Ebrahimi, O Mutlu, YN Patt
2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture …, 2016
Continuous runahead: Transparent hardware acceleration for memory intensive workloads
M Hashemi, O Mutlu, YN Patt
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
Aater Suleman, Milad Hashemi, Chris Wilkerson, Yale N. Patt, MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP
M Khubaib
Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on …, 2012
Diabetes as the cause of end-stage renal disease affects the pattern of post kidney transplant rehospitalizations
M Ramezani, K Ghoddousi, M Hashemi, HR Khoddami-Vishte, ...
Transplantation proceedings 39 (4), 966-969, 2007
Prolonged rehospitalizations following renal transplantation: causes, risk factors, and outcomes
M Naderi, J Aslani, M Hashemi, S Assari, M Amini, V Pourfarziani
Transplantation proceedings 39 (4), 978-980, 2007
Filtered runahead execution with a runahead buffer
M Hashemi, YN Patt
Proceedings of the 48th International Symposium on Microarchitecture, 358-369, 2015
Learning Execution through Neural Code Fusion
Z Shi, K Swersky, D Tarlow, P Ranganathan, M Hashemi
arXiv preprint arXiv:1906.07181, 2019
An imitation learning approach for cache replacement
E Liu, M Hashemi, K Swersky, P Ranganathan, J Ahn
International Conference on Machine Learning, 6237-6247, 2020
Efficient execution of bursty applications
M Hashemi, D Marr, D Carmean, YN Patt
IEEE Computer Architecture Letters 15 (2), 85-88, 2015
Machine Learning for Systems
H Litz, M Hashemi
IEEE Micro 40 (5), 6-7, 2020
Disaggregating latent causes for computer system optimization
MO Hashemi, P Ranganathan, H Satija
US Patent 10,650,001, 2020
On-chip mechanisms to reduce effective memory access latency
M Hashemi
arXiv preprint arXiv:1609.00306, 2016
A Neural Hierarchical Sequence Model for Irregular Data Prefetching
Z Shi, A Jain, K Swersky, M Hashemi, P Ranganathan, C Lin
No MCMC for me: Amortized sampling for fast and stable training of energy-based models
W Grathwohl, J Kelly, M Hashemi, M Norouzi, K Swersky, D Duvenaud
arXiv preprint arXiv:2010.04230, 2020
Learned Hardware/Software Co-Design of Neural Accelerators
Z Shi, C Sakhuja, M Hashemi, K Swersky, C Lin
arXiv preprint arXiv:2010.02075, 2020
Disaggregating latent causes for computer system optimization
MO Hashemi, P Ranganathan, H Satija
US Patent App. 16/840,699, 2020
Neural Execution Engines: Learning to Execute Subroutines
Y Yan, K Swersky, D Koutra, P Ranganathan, M Hashemi
arXiv preprint arXiv:2006.08084, 2020
Multi-task recurrent neural networks
MO Hashemi, JA Smith, KJ Swersky
US Patent App. 16/262,785, 2020
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