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Maria K Michael
Maria K Michael
Electrical and Computer Engineering Department, KIOS Center of Excellence, University of Cyprus
Verified email at ucy.ac.cy - Homepage
Title
Cited by
Cited by
Year
Exact path delay fault coverage with fundamental ZBDD operations
S Padmanaban, MK Michael, S Tragoudas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
622003
Test set generation with a large number of unspecified bits using static and dynamic techniques
SN Neophytou, MK Michael
IEEE Transactions on Computers 59 (3), 301-316, 2009
382009
ATPG tools for delay faults at the functional level
M Michael, S Tragoudas
ACM Transactions on Design Automation of Electronic Systems (TODAES) 7 (1 …, 2002
332002
ATPG tools for delay faults at the functional level
M Michael, S Tragoudas
ACM Transactions on Design Automation of Electronic Systems (TODAES) 7 (1 …, 2002
332002
ATPG for path delay faults without path enumeration
M Micheal, S Tragoudas
Proceedings of the IEEE 2001. 2nd International Symposium on Quality …, 2001
332001
Classifying network abnormalities into faults and attacks in IoT-based cyber physical systems using machine learning
G Tertytchny, N Nicolaou, MK Michael
Microprocessors and Microsystems 77, 103121, 2020
322020
Function-based compact test pattern generation for path delay faults
MK Michael, S Tragoudas
IEEE transactions on very large scale integration (VLSI) systems 13 (8), 996 …, 2005
312005
Dependable multicore architectures at nanoscale: The view from europe
M Ottavi, S Pontarelli, D Gizopoulos, C Bolchini, MK Michael, L Anghel, ...
IEEE Design & Test 32 (2), 17-28, 2014
292014
A novel sbst generation technique for path-delay faults in microprocessors exploiting gate-and rt-level descriptions
K Christou, MK Michael, P Bernardi, M Grosso, E Sánchez, MS Reorda
26th IEEE VLSI Test Symposium (vts 2008), 389-394, 2008
292008
Accelerating diagnosis via dominance relations between sets of faults
R Adapa, S Tragoudas, MK Michael
25th IEEE VLSI Test Symposium (VTS'07), 219-224, 2007
222007
DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems
MA Skitsas, CA Nicopoulos, MK Michael
2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2013
212013
DaemonGuard: Enabling O/S-orchestrated fine-grained software-based selective-testing in multi-/many-core microprocessors
MA Skitsas, CA Nicopoulos, MK Michael
IEEE Transactions on Computers 65 (5), 1453-1466, 2015
192015
Scalable parallel fault simulation for shared-memory multiprocessor systems
S Hadjitheophanous, SN Neophytou, MK Michael
2016 IEEE 34th VLSI Test Symposium (VTS), 1-6, 2016
182016
FPGA-based laboratory assignments for NoC-based manycore systems
C Ttofis, T Theocharides, MK Michael
IEEE Transactions on Education 55 (2), 180-189, 2011
182011
Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation
T Theocharides, MK Michael, M Polycarpou, A Dingankar
Proceedings of the 19th ACM Great Lakes symposium on VLSI, 121-124, 2009
172009
Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors
M Maniatakos, MK Michael, Y Makris
2012 IEEE International Test Conference, 1-8, 2012
162012
On the relaxation of n-detect test sets
S Neophytou, MK Michael
26th IEEE VLSI Test Symposium (vts 2008), 187-192, 2008
162008
Demonstration of man in the middle attack on a commercial photovoltaic inverter providing ancillary services
G Tertytchny, H Karbouj, L Hadjidemetriou, C Charalambous, MK Michael, ...
2020 IEEE CyberPELS (CyberPELS), 1-7, 2020
152020
Revisiting vulnerability analysis in modern microprocessors
M Maniatakos, M Michael, C Tirumurti, Y Makris
IEEE Transactions on Computers 64 (9), 2664-2674, 2014
152014
Multiple-bit upset protection in microprocessor memory arrays using vulnerability-based parity optimization and interleaving
M Maniatakos, MK Michael, Y Makris
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (11 …, 2014
152014
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