High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling S Bangsaruntip, GM Cohen, A Majumdar, Y Zhang, SU Engelmann, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 595 | 2009 |
Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm S Bangsaruntip, A Majumdar, GM Cohen, SU Engelmann, Y Zhang, ... 2010 symposium on VLSI technology, 21-22, 2010 | 299 | 2010 |
A high performance phase change memory with fast switching speed and high temperature retention by engineering the GexSbyTez phase change material HY Cheng, TH Hsu, S Raoux, JY Wu, PY Du, M Breitwisch, Y Zhu, EK Lai, ... 2011 International Electron Devices Meeting, 3.4. 1-3.4. 4, 2011 | 106 | 2011 |
Electromigration in cu (al) and cu (mn) damascene lines CK Hu, J Ohm, LM Gignac, CM Breslin, S Mittal, G Bonilla, D Edelstein, ... Journal of applied physics 111 (9), 2012 | 70 | 2012 |
Gate-all-around silicon nanowire MOSFETs and circuits JW Sleight, S Bangsaruntip, A Majumdar, GM Cohen, Y Zhang, ... 68th Device Research Conference, 269-272, 2010 | 26 | 2010 |
Discontinuous/non-uniform metal cap structure and process for interconnect integration CC Yang, LM Gignac, CK Hu, S Mittal US Patent 8,823,176, 2014 | 12 | 2014 |
Effect of impurity on Cu electromigration CK Hu, M Angyal, BC Baker, G Bonilla, C Cabral, DF Canaperi, S Choi, ... AIP conference proceedings 1300 (1), 57-67, 2010 | 11 | 2010 |
The impact of melting during reset operation on the reliability of phase change memory PY Du, JY Wu, TH Hsu, MH Lee, TY Wang, HY Cheng, EK Lai, SC Lai, ... 2012 IEEE International Reliability Physics Symposium (IRPS), 6C. 2.1-6C. 2.6, 2012 | 9 | 2012 |
Optimization of programming current on endurance of phase change memory S Kim, PY Du, J Li, M Breitwisch, Y Zhu, S Mittal, R Cheek, TH Hsu, ... Proceedings of Technical Program of 2012 VLSI Technology, System and …, 2012 | 6 | 2012 |
Multiple double cross-section transmission electron microscope sample preparation of specific sub-10 nm diameter Si nanowire devices LM Gignac, S Mittal, S Bangsaruntip, GM Cohen, JW Sleight Microscopy and Microanalysis 17 (6), 889-895, 2011 | 6 | 2011 |
a. Schrott, SC Lai, HL Lung, C. Lam HY Cheng, TH Hsu, S Raoux, JY Wu, PY Du, M Breitwisch, Y Zhu, EK Lai, ... IEEE Int. Electron Devices Meet 3 (4), 1, 2011 | 5 | 2011 |
Multiple double XTEM sample preparation of sub-10 nm diameter Si nanowires L Gignac, S Mittal, S Bansaruntip, G Cohen, J Sleight Microscopy and microanalysis 16 (S2), 168-169, 2010 | 5 | 2010 |
Precision, double XTEM sample preparation of site specific Si nanowires LM Gignac, S Mittal, S Bangsaruntip, GM Cohen, JW Sleight Microscopy and Microanalysis 15 (S2), 330-331, 2009 | 5 | 2009 |
Interface state density measurements in gated pin silicon nanowires as a function of the nanowire diameter GM Cohen, E Cartier, S Bangsaruntip, A Majumdar, W Haensch, ... 68th Device Research Conference, 277-278, 2010 | 3 | 2010 |
High performance and highly uniform metal Hi-K gate-all-around silicon nanowire MOSFETs JW Sleight, S Bangsaruntip, G Cohen, A Majumdar, Y Zhang, ... ECS Transactions 28 (1), 179, 2010 | 3 | 2010 |
Hybrid clean approach for post-copper CMP defect reduction WT Tseng, V Devarapalli, J Steffes, A Ticknor, M Khojasteh, P Poloju, ... ASMC 2013 SEMI Advanced Semiconductor Manufacturing Conference, 346-351, 2013 | 2 | 2013 |
Discontinuous/non-uniform metal cap structure and process for interconnect integration CC Yang, LM Gignac, CK Hu, S Mittal US Patent 8,889,546, 2014 | | 2014 |
Wafer Scale Cu Plating Process Optimization for Defectivity Improvement S Ahmed, Q Huang, T Cheng, P Findeis, CR Gruszecki, AH Simon, ... Electrochemical Society Meeting Abstracts 225, 1442-1442, 2014 | | 2014 |
Effects of Al and Mn impurities on Cu electromigration CK Hu, J Ohm, CM Breslin, S Mittal, LM Gignac, G Bonilla, D Edelstein, ... Advanced Metallization Conference, 2011 | | 2011 |