| Lightweight cryptography for FPGAs P Yalla, JP Kaps 2009 international conference on reconfigurable computing and FPGAs, 225-230, 2009 | 169 | 2009 |
| Lightweight implementations of SHA-3 candidates on FPGAs JP Kaps, P Yalla, KK Surapathi, B Habib, S Vadlamudi, S Gurung, J Pham Progress in Cryptology–INDOCRYPT 2011: 12th International Conference on …, 2011 | 92 | 2011 |
| CAESAR Hardware API E Homsirikamol, W Diehl, A Ferozpuri, F Farahmand, P Yalla, JP Kaps, ... eprint, 2016 | 72 | 2016 |
| Comparison of hardware and software implementations of selected lightweight block ciphers W Diehl, F Farahmand, P Yalla, JP Kaps, K Gaj Field Programmable Logic and Applications (FPL), 2017 27th International …, 2017 | 66 | 2017 |
| Compact FPGA implementation of Camellia P Yalla, JP Kaps 2009 international conference on field programmable logic and applications …, 2009 | 31 | 2009 |
| A scalable ECC processor implementation for high-speed and lightweight with side-channel countermeasures A Salman, A Ferozpuri, E Homsirikamol, P Yalla, JP Kaps, K Gaj 2017 international conference on ReConFigurable Computing and FPGAs …, 2017 | 28 | 2017 |
| Evaluation of the CAESAR hardware API for lightweight implementations P Yalla, JP Kaps 2017 International Conference on ReConFigurable Computing and FPGAs …, 2017 | 28 | 2017 |
| Implementer’s Guide to Hardware Implementations Compliant with the CAESAR Hardware API E Homsirikamol, P Yalla, F Farahmand, W Diehl, A Ferozpuri, JP Kaps, ... George Mason University, Fairfax, VA, GMU Report, 2016 | 28 | 2016 |
| Differential power analysis attack on FPGA implementation of AES R Velegalati, P Yalla ECE, 2008 | 18 | 2008 |
| Development Package for Hardware Implementations Compliant with the CAESAR Hardware API E Homsirikamol, P Yalla, F Farahmand, JP Kaps, K Gaj | 10 | 2017 |
| Comparison of multi-purpose cores of Keccak and AES P Yalla, E Homsirikamol, JP Kaps 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 585-588, 2015 | 10 | 2015 |
| Toward fair and comprehensive benchmarking of CAESAR candidates in hardware: Standard API, high-speed implementations in VHDL/verilog, and benchmarking using FPGAs E Homsirikamol, W Diehl, A Ferozpuri, F Farahmand, MX Lyons, P Yalla, ... Proc. Directions Authenticated Ciphers (DIAC), 2016 | 4 | 2016 |
| Differential power analysis on light weight implementations of block ciphers PS Yalla | 4 | 2009 |
| Differential fault analysis using symbolic execution J van Woudenberg, CB Breunesse, R Velegalati, P Yalla, S Gonzalez Proceedings of the 7th Software Security, Protection, and Reverse …, 2017 | 2 | 2017 |
| Implementer’s Guide to Hardware Implementations Compliant with the CAESAR Hardware API version 2.0 E Homsirikamol, P Yalla, F Farahmand, W Diehl, A Ferozpuri, J Kaps, ... online: https://cryptography. gmu. edu/athena/CAESAR_HW_API …, 2017 | 1 | 2017 |
| Methodology for Developing Lightweight Architectures for FPGAs PSVVK Yalla George Mason University, 2017 | | 2017 |
| Lightweight implementations of SHA-3 finalists on FPGAs JP Kaps, P Yalla, KK Surapathi, B Habib, S Vadlamudi, S Gurung The Third SHA-3 Candidate Conference, 1-17, 2012 | | 2012 |
| Notice and Invitation P Yalla | | |
| Computer-Aided Design Tools and Methodologies for Evaluating Candidates in Cryptographic Contests1 E Homsirikamol, F Farahmand, A Ferozpuri, M Rogawski, P Yalla, K Gaj | | |
Jens-Peter KapsAssociate Professor of Electrical and Computer Engineering, George Mason UniversityVerified email at gmu.edu
