| Hardware-oriented Approximation of Convolutional Neural Networks P Gysel, M Motamedi, S Ghiasi Workshop contribution at ICLR (2016), 2016 | 393 | 2016 |
| Ristretto: A framework for empirical study of resource-efficient inference in convolutional neural networks P Gysel, J Pimentel, M Motamedi, S Ghiasi IEEE Transactions on Neural Networks and Learning Systems 29 (11), 5784-5789, 2018 | 303 | 2018 |
| Design space exploration of FPGA-based deep convolutional neural networks M Motamedi, P Gysel, V Akella, S Ghiasi 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 575-580, 2016 | 248 | 2016 |
| Ristretto: Hardware-Oriented Approximation of Convolutional Neural Networks P Gysel University of California, Davis, 2016 | 171 | 2016 |
| PLACID: a platform for FPGA-based accelerator creation for DCNNs M Motamedi, P Gysel, S Ghiasi ACM Transactions on Multimedia Computing, Communications, and Applications …, 2017 | 37 | 2017 |
| ZEST: Attention-based Zero-Shot Learning for Unseen IoT Device Classification B Wu, P Gysel, DM Divakaran, M Gurusamy IEEE/IFIP NOMS 2024, 2024 | | 2024 |
Soheil GhiasiProfessor, University of California, DavisVerified email at ucdavis.edu
