| Modular routing design for chiplet-based systems J Yin, Z Lin, O Kayiran, M Poremba, MSB Altaf, NE Jerger, GH Loh 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 97 | 2018 |
| Lost in abstraction: Pitfalls of analyzing GPUs at the intermediate language level A Gutierrez, BM Beckmann, A Dutu, J Gross, M LeBeane, J Kalamatianos, ... 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 74 | 2018 |
| Energy-efficient time-division multiplexed hybrid-switched NoC for heterogeneous multicore systems J Yin, P Zhou, SS Sapatnekar, A Zhai 2014 IEEE 28th International Parallel and Distributed Processing Symposium …, 2014 | 48 | 2014 |
| TENET: A framework for modeling tensor dataflow based on relation-centric notation L Lu, N Guan, Y Wang, L Jia, Z Luo, J Yin, J Cong, Y Liang 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 41 | 2021 |
| Kite: A family of heterogeneous interposer topologies enabled via accurate interconnect modeling S Bharadwaj, J Yin, B Beckmann, T Krishna 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 41 | 2020 |
| Designing a cost-effective cache replacement policy using machine learning S Sethumurugan, J Yin, J Sartori 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 30 | 2021 |
| Toward more efficient noc arbitration: A deep reinforcement learning approach J Yin, Y Eckert, S Che, M Oskin, GH Loh Proc. IEEE 1st Int. Workshop AI-assisted Des. Architecture 128, 2018 | 30 | 2018 |
| There and back again: Optimizing the interconnect in networks of memory cubes M Poremba, I Akgun, J Yin, O Kayiran, Y Xie, GH Loh ACM SIGARCH Computer Architecture News 45 (2), 678-690, 2017 | 30 | 2017 |
| Experiences with ml-driven design: A noc case study J Yin, S Sethumurugan, Y Eckert, C Patel, A Smith, E Morton, M Oskin, ... 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 27 | 2020 |
| Energy-efficient non-minimal path on-chip interconnection network for heterogeneous systems J Yin, P Zhou, A Holey, SS Sapatnekar, A Zhai Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 27 | 2012 |
| NoC frequency scaling with flexible-pipeline routers P Zhou, J Yin, A Zhai, SS Sapatnekar IEEE/ACM International Symposium on Low Power Electronics and Design, 403-408, 2011 | 25 | 2011 |
| Efficient synthetic traffic models for large, complex SoCs J Yin, O Kayiran, M Poremba, NE Jerger, GH Loh 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 17 | 2016 |
| CryptoGCN: Fast and scalable homomorphically encrypted graph convolutional network inference R Ran, W Wang, Q Gang, J Yin, N Xu, W Wen Advances in Neural Information Processing Systems 35, 37676-37689, 2022 | 9 | 2022 |
| Improving address translation in multi-gpus via sharing and spilling aware tlb design B Li, J Yin, Y Zhang, X Tang MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 9 | 2021 |
| Modular Routing Design for Chiplet-Based Systems. In 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA). 726–738 J Yin, Z Lin, O Kayiran, M Poremba, MSB Altaf, NE Jerger, GH Loh | 6 | 2018 |
| Selecting a precision level for executing a workload in an electronic device AT Gutierrez, S Blagodurov, SA Moe, X Zhang, J Yin, MD Sinclair US Patent 11,150,899, 2021 | 5 | 2021 |
| Design Challenges of Intra-and Inter-Chiplet Interconnection C Chen, J Yin, Y Peng, M Palesi, W Cao, L Huang, AK Singh, H Zhi, ... IEEE Design and Test 39 (6), 99-109, 2022 | 4 | 2022 |
| An orchestrated noc prioritization mechanism for heterogeneous cpu-gpu systems X Cai, J Yin, P Zhou Integration 65, 344-350, 2019 | 4 | 2019 |
| NeuroPots: Realtime Proactive Defense against Bit-Flip Attacks in Neural Networks Q Liu, J Yin, W Wen, C Yang, S Sha | 3 | 2023 |
| Reconfigurable prediction engine for general processor counting S Che, J Yin US Patent App. 15/922,875, 2019 | 3 | 2019 |
Matthew PorembaAMD ResearchVerified email at amd.com
