Hasan Erdem Yantır
Title
Cited by
Cited by
Year
Efficient implementations of multi-pumped multi-port register files in FPGAs
HE Yantir, S Bayar, A Yurdakul
2013 Euromicro Conference on Digital System Design, 185-192, 2013
242013
Application specific multi-port memory customization in FPGAs
GA Malazgirt, HE Yantir, A Yurdakul, S Niar
2014 24th International Conference on Field Programmable Logic andá…, 2014
122014
Approximate memristive in-memory computing
HE Yantir, AM Eltawil, FJ Kurdahi
ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-18, 2017
112017
An efficient heterogeneous register file implementation for FPGAs
HE Yantir, A Yurdakul
2014 IEEE International Parallel & Distributed Processing Symposiumá…, 2014
102014
A hybrid approximate computing approach for associative in-memory processors
HE Yantır, AM Eltawil, FJ Kurdahi
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4á…, 2018
62018
A two-dimensional associative processor
HE Yantır, AM Eltawil, FJ Kurdahi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (9á…, 2018
52018
Process variations-aware resistive associative processor design
HE Yantır, ME Fouda, AM Eltawil, FJ Kurdahi
2016 IEEE 34th International Conference on Computer Design (ICCD), 49-55, 2016
52016
An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor
HE Yantir, W Guo, AM Eltawil, FJ Kurdahi, KN Salama
Micromachines 10 (8), 509, 2019
22019
Power optimization techniques for associative processors
HE Yantır, AM Eltawil, S Niar, FJ Kurdahi
Journal of Systems Architecture 90, 44-53, 2018
22018
Power Performance Tradeoffs Using Adaptive Bit Width Adjustments on Resistive Associative Processors
RA Abdelaal, HE Yantır, AM Eltawil, FJ Kurdahi
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (1), 302-312, 2018
22018
Rapid In-Memory Matrix Multiplication Using Associative Processor
MA Neggaz, HE Yantır, S Niar, A Eltawil, F Kurdahi
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018
22018
Efficient Acceleration of Computation Using Associative In-memory Processing
HE Yantir
UC Irvine, 2018
12018
Work-in-progress: efficient pulsed-latch implementation for multiport register files
WM Elsharkasy, HE Yantir, A Khajeh, AM Eltawil, FJ Kurdahi
2017 International Conference on Compilers, Architectures and Synthesis Forá…, 2017
12017
Resistive content addressable memory based in-memory computation architecture
KN Salama, MA Zidan, F Kurdahi, AM Eltawil
12016
Towards Efficient Neuromorphic Hardware: Unsupervised Adaptive Neuron Pruning
W Guo, HE Yantır, ME Fouda, AM Eltawil, KN Salama
Electronics 9 (7), 1059, 2020
2020
Efficient Acceleration of Stencil Applications through In-Memory Computing
HE Yantır, AM Eltawil, KN Salama
Micromachines 11 (6), 622, 2020
2020
Low-Power Resistive Associative Processor Implementation Through the Multi-Compare
HE Yantır, AM Eltawil, FJ Kurdahi
2018 25th IEEE International Conference on Electronics, Circuits and Systemsá…, 2018
2018
Efficient pulsed-latch implementation for multiport register files: work-in-progress
WM Elsharkasy, HE Yantir, A Khajeh, AM Eltawil, FJ Kurdahi
Proceedings of the 2017 International Conference on Compilers, Architecturesá…, 2017
2017
A SYSTEMATIC APPROACH FOR REGISTER FILE DESIGN IN FPGAs
HE Yantır
Bogaziši University, 2014
2014
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Articles 1–19