Kaveh Hosseini, PhD
Kaveh Hosseini, PhD
Intel Corporation & Adjunct Associate Professor University College Dublin
Verified email at intel.com
Cited by
Cited by
Maximum sequence length MASH digital delta–sigma modulators
K Hosseini, MP Kennedy
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (12), 2628-2638, 2007
Mathematical analysis of digital MASH delta-sigma modulators for fractional-N frequency synthesizers
K Hosseini, MP Kennedy
2006 Ph. D. Research in Microelectronics and Electronics, 309-312, 2006
Minimizing Spurious Tones in Digital Delta-Sigma Modulators
K Hosseini, MP Kennedy
Springer Science & Business Media, 2011
Mathematical analysis of a prime modulus quantizer MASH digital delta–sigma modulator
K Hosseini, MP Kennedy
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (12), 1105-1109, 2007
Architectures for maximum-sequence-length digital delta-sigma modulators
K Hosseini, MP Kennedy
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (11), 1104-1108, 2008
Observations concerning the generation of spurious tones in digital delta-sigma modulators followed by a memoryless nonlinearity
K Hosseini, B Fitzgibbon, MP Kennedy
IEEE Transactions on Circuits and Systems II: Express Briefs 58 (11), 714-718, 2011
Tunable baseline compensation scheme for touchscreen controllers
A Page, T Williams, RK Singh, K Hosseini, J Peterson, A Maharyta
US Patent 9,164,137, 2015
Calculation of sequence lengths in MASH 1-1-1 digital delta sigma modulators with a constant input
K Hosseini, MP Kennedy, C McCarthy
2007 Ph. D Research in Microelectronics and Electronics Conference, 13-16, 2007
Capacitive fingerprint sensor with quadrature demodulator and multiphase scanning
V Kremin, PM Walsh, K Hosseini, JS Johal, E Hancioglu, O Ozbek
US Patent 9,542,588, 2017
Prediction of the spectrum of a digital delta–sigma modulator followed by a polynomial nonlinearity
K Hosseini, MP Kennedy, SH Lewis, BC Levy
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 1905-1913, 2010
Oscillator package
I Alhayek, J Adamski, M Black, C Ernsberger, J Langhorn
US Patent App. 10/268,867, 2004
Generating a baseline compensation signal based on a capacitive circuit
R Ogirko, D Ellis, K Hosseini, B Lawton
US Patent 10,429,998, 2019
Providing a baseline capacitance for a capacitance sensing channel
D Ellis, R Ogirko, K Hosseini, B Lawton, T Williams, G Rowe
US Patent 9,746,974, 2017
Baseline compensation for capacitive sensing
V Kremin, K Hosseini, R Ogirko, A Maharyta
US Patent 10,068,121, 2018
A spur-free MASH digital delta-sigma modulator with higher order shaped dither
B Fitzgibbon, K O'Neill, A Grannell, C Horgan, Z Yet, K Hosseinit, ...
2009 European Conference on Circuit Theory and Design, 723-726, 2009
Performance analysis of low power high speed pipelined adders for digital ΣΔ modulators
P Bhansali, K Hosseini, MP Kennedy
Electronics Letters 42 (25), 1442-1444, 2006
A sigma-delta modulator
K Hosseini, MP Kennedy
Irish Patent NATI82/P/IE, 2006
High-Speed Capacitance Measuring System for Process Tomography
KH Javad Frounchi, Ali-Reza Bazzazi, Khabat Ebnabbasi
3rd World Congress on Industrial Process Tomography, 2003
Slew rate and bandwidth enhancement in reset
S Murugesan, P Walsh, G Baldwin, K Hosseini
US Patent 8,791,753, 2014
Predicting the noise floor at the output of a memoryless piecewise-linear nonlinearity driven by a digital delta-sigma modulator
O Lakhal, MP Kennedy, K Hosseini
IET Digital Library, 2012
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