| Scalable digital CMOS comparator using a parallel prefix tree S Abdel-Hafeez, A Gordon-Ross, B Parhami IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (11 …, 2012 | 52 | 2012 |
| An Efficient O( ) Comparison-Free Sorting Algorithm S Abdel-Hafeez, A Gordon-Ross IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (6 …, 2017 | 41 | 2017 |
| Single rail domino logic for four-phase clocking scheme S Abdel-Hafeez, N Ranjan US Patent 6,265,899, 2001 | 39 | 2001 |
| High Performance AES Design using Pipelining Structure over GF((24)2) S Abdel-Hafeez, A Sawalmeh, S Bataineh 2007 IEEE International Conference on Signal Processing and Communications …, 2007 | 33* | 2007 |
| A digital CMOS parallel counter architecture based on state look-ahead logic S Abdel-Hafeez, A Gordon-Ross IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (6 …, 2010 | 32 | 2010 |
| A VLSI high-performance priority encoder using standard CMOS library S Abdel-Hafeez, S Harb IEEE Transactions on Circuits and Systems II: Express Briefs 53 (8), 597-601, 2006 | 31 | 2006 |
| High speed digital CMOS divide-by-N fequency divider S Abdel-Hafeez, SM Harb, WR Eisenstadt 2008 IEEE International Symposium on Circuits and Systems, 592-595, 2008 | 29 | 2008 |
| System and method for efficiently implementing a double data rate memory architecture SM Abdel-Hafeez, SP Sribhashyam US Patent 6,356,509, 2002 | 24 | 2002 |
| On-chip jitter measurement architecture using a delay-locked loop with vernier delay line, to the order of giga hertz S Abdel-Hafeez, SM Harb, KM Lee Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011 | 12 | 2011 |
| A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems A Gordon-Ross, S Abdel-Hafeez, MH Alsafrjalni 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019 | 10 | 2019 |
| A Gigahertz Digital CMOS Divide-by-N Frequency Divider Based on a State Look-Ahead Structure S Abdel-Hafeez, A Gordon-Ross Circuits, Systems, and Signal Processing 30, 1549-1572, 2011 | 10 | 2011 |
| External power ring with multiple tapings to reduce IR drop in integrated circuit KM Li, SM Abdel-Hafeez US Patent 7,417,328, 2008 | 10* | 2008 |
| Reconfigurable FIFO memory circuit for synchronous and asynchronous communication S Abdel‐hafeez, A Gordon‐Ross International Journal of Circuit Theory and Applications 49 (4), 938-952, 2021 | 8 | 2021 |
| A one-cycle asynchronous FIFO queue buffer circuit S Abdel-Hafeez, MQ Quwaider 2020 11th International Conference on Information and Communication Systems …, 2020 | 6 | 2020 |
| A comparison-free sorting algorithm on CPUs and GPUs S Abdel-Hafeez, A Gordon-Ross, S Abubaker The Journal of Supercomputing 74, 6369-6400, 2018 | 5 | 2018 |
| A double data rate 8T-cell SRAM architecture for systems-on-chip SM Abdel-Hafeez, M Shatnawi, A Gordon-Ross 2012 International Symposium on System on Chip (SoC), 1-4, 2012 | 4 | 2012 |
| A new high-speed SAR ADC architecture S Abdel-Hafeez 2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling …, 2010 | 4 | 2010 |
| CMOS Eight-Transistor Memory Cell for Low-Dynamic-Power High-Speed Embedded SRAM SM Abdel-Hafeez, AS Matalkah Journal of Circuits, Systems, and Computers 17 (05), 845-863, 2008 | 4 | 2008 |
| A low-power CAM using a 12-transistor design cell S Abdel-Hafeez, SM Harb, WR Eisenstadt 2007 IFIP International Conference on Very Large Scale Integration, 264-269, 2007 | 4 | 2007 |
| A comparison-free sorting algorithm S Abdel-Hafeez, A Gordon-Ross 2014 International SoC Design Conference (ISOCC), 214-215, 2014 | 3 | 2014 |
Behrooz ParhamiUniversity of California, Santa BarbaraVerified email at ece.ucsb.edu
