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Jianhua Li
Jianhua Li
Verified email at hfut.edu.cn
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Cited by
Cited by
Year
STT-RAM based energy-efficiency hybrid cache for CMPs
J Li, CJ Xue, Y Xu
2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 31-36, 2011
1012011
ExLRU: A unified write buffer cache management for flash memory
L Shi, J Li, CJ Xue, C Yang, X Zhou
Proceedings of the ninth ACM international conference on Embedded software …, 2011
542011
Compiler-assisted STT-RAM-based hybrid cache for energy efficient embedded systems
Q Li, J Li, L Shi, M Zhao, CJ Xue, Y He
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (8 …, 2013
512013
Compiler-assisted refresh minimization for volatile STT-RAM cache
Q Li, Y He, J Li, L Shi, Y Chen, CJ Xue
IEEE Transactions on Computers 64 (8), 2169-2181, 2014
472014
MAC: Migration-aware compilation for STT-RAM based hybrid cache in embedded systems
Q Li, J Li, L Shi, CJ Xue, Y He
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
422012
Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache
J Li, L Shi, CJ Xue, C Yang, Y Xu
2011 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 19-28, 2011
402011
Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh
J Li, L Shi, Q Li, CJ Xue, Y Chen, Y Xu, W Wang
ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (1 …, 2013
342013
Hybrid nonvolatile disk cache for energy-efficient and high-performance systems
L Shi, J Li, C Jason Xue, X Zhou
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1 …, 2013
312013
Cache coherence enabled adaptive refresh for volatile STT-RAM
J Li, L Shi, CJ Xue, Y Chen, Y Xu
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
222013
Task allocation on nonvolatile-memory-based hybrid main memory
W Tian, Y Zhao, L Shi, Q Li, J Li, CJ Xue, M Li, E Chen
IEEE transactions on very large scale integration (VLSI) systems 21 (7 …, 2012
192012
Optimal task allocation on non-volatile memory based hybrid main memory
W Tian, J Li, Y Zhao, CJ Xue, M Li, E Chen
Proceedings of the 2011 ACM Symposium on Research in Applied Computation, 1-6, 2011
182011
Cooperating virtual memory and write buffer management for flash-based storage systems
L Shi, J Li, CJ Xue, X Zhou
IEEE transactions on very large scale integration (VLSI) systems 21 (4), 706-719, 2012
132012
A unified write buffer cache management scheme for flash memory
L Shi, J Li, Q Li, CJ Xue, C Yang, X Zhou
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (12 …, 2014
112014
WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture
Y Huang, L Shi, J Li, Q Li, CJ Xue
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (1), 168-180, 2013
112013
Phylogenetic evaluation of series delimitations in section Palmata (Acer, Aceroideae, Sapindaceae) based on sequences of nuclear and chloroplast genes
J Li
Aliso: A Journal of Systematic and Floristic Botany 29 (1), 43-49, 2011
112011
Code motion for migration minimization in STT-RAM based hybrid cache
Q Li, L Shi, J Li, CJ Xue, Y He
2012 IEEE Computer Society Annual Symposium on VLSI, 410-415, 2012
102012
LADPM: Latency-aware dual-partition multicast routing for mesh-based network-on-chips
J Li, CJ Xue, Y Xu
2010 IEEE 16th International Conference on Parallel and Distributed Systems …, 2010
92010
Thread progress aware coherence adaption for hybrid cache coherence protocols
J Li, L Shi, CJ Xue, Y Xu
IEEE Transactions on Parallel and Distributed Systems 25 (10), 2697-2707, 2013
72013
Thread criticality assisted replication and migration for chip multiprocessor caches
J Li, M Li, CJ Xue, Y Ouyang, F Shen
IEEE Transactions on Computers 66 (10), 1747-1762, 2017
62017
Cache optimization approaches of emerging non-volatile memory architecture: a survey
Y He, F Shen, J Zhang, N Jiang, Q Li, J Li
Journal of Computer Research & Development, 2015
42015
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Articles 1–20