| Single-path nas: Designing hardware-efficient convnets in less than 4 hours D Stamoulis, R Ding, D Wang, D Lymberopoulos, B Priyantha, J Liu, ... Joint European Conference on Machine Learning and Knowledge Discovery in …, 2019 | 279 | 2019 |
| NeuralPower: Predict and Deploy Energy-Efficient Convolutional Neural Networks E Cai, DC Juan, D Stamoulis, D Marculescu Asian Conference on Machine Learning, 622-637, 2017 | 149 | 2017 |
| Hyperpower: Power-and memory-constrained hyper-parameter optimization for neural networks D Stamoulis, E Cai, DC Juan, D Marculescu 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 19-24, 2018 | 90* | 2018 |
| Designing adaptive neural networks for energy-constrained image classification D Stamoulis, TWR Chin, AK Prakash, H Fang, S Sajja, M Bognar, ... 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 74 | 2018 |
| Hardware-aware machine learning: Modeling and optimization D Marculescu, D Stamoulis, E Cai 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 46 | 2018 |
| Single-path mobile automl: Efficient convnet design and nas hyperparameter optimization D Stamoulis, R Ding, D Wang, D Lymberopoulos, B Priyantha, J Liu, ... IEEE Journal of Selected Topics in Signal Processing 14 (4), 609-622, 2020 | 33 | 2020 |
| Exploring aging deceleration in FinFET-based multi-core systems E Cai, D Stamoulis, D Marculescu 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 23 | 2016 |
| Profit:Priority and Power/Performance Optimization for Many-Core Systems Z Chen, D Stamoulis, D Marculescu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 19 | 2017 |
| Single-Path NAS: Device-Aware Efficient ConvNet Design D Stamoulis, R Ding, D Wang, D Lymberopoulos, B Priyantha, J Liu, ... arXiv preprint arXiv:1905.04159, 2019 | 17 | 2019 |
| Can we guarantee performance requirements under workload and process variations? D Stamoulis, D Marculescu Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 16 | 2016 |
| Capturing true workload dependency of bti-induced degradation in cpu components D Stamoulis, S Corbetta, D Rodopoulos, P Weckx, P Debacker, BH Meyer, ... Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 373-376, 2016 | 12 | 2016 |
| Efficient reliability analysis of processor datapath using atomistic bti variability models D Stamoulis, D Rodopoulos, BH Meyer, D Soudris, F Catthoor, Z Zilic Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 57-62, 2015 | 10 | 2015 |
| Understanding timing impact of BTI/RTN with massively threaded atomistic transient simulations D Rodopoulos, D Stamoulis, G Lyras, D Soudris, F Catthoor 2014 IEEE International Conference on IC Design & Technology, 1-4, 2014 | 10 | 2014 |
| AntiDoteX: Attention-Based Dynamic Optimization for Neural Network Runtime Efficiency F Yu, Z Xu, C Liu, D Stamoulis, D Wang, Y Wang, X Chen IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 8 | 2022 |
| Putting the" Machine" Back in Machine Learning for Engineering Students R Chin, D Stamoulis, D Marculescu ECMLPKDD 2021 Workshop TeachML, 2021 | 7* | 2021 |
| Towards latency-aware dnn optimization with gpu runtime analysis and tail effect elimination F Yu, Z Xu, T Shen, D Stamoulis, L Shangguan, D Wang, R Madhok, ... arXiv preprint arXiv:2011.03897, 2020 | 7 | 2020 |
| Hardware-aware automl for efficient deep learning applications D Stamoulis Carnegie Mellon University, 2020 | 4 | 2020 |
| Linear regression techniques for efficient analysis of transistor variability D Stamoulis, D Rodopoulos, BH Meyer, D Soudris, Z Zilic 2014 21st IEEE international conference on electronics, circuits and systems …, 2014 | 4 | 2014 |
| Enhancing precipitation models by capturing multivariate and multiscale climate dynamics R Ding, D Stamoulis, K Bhardwaj, D Marculescu, R Marculescu Proceedings of the 3rd International Workshop on Cyber-Physical Systems for …, 2017 | 3 | 2017 |
| Third ArchEdge Workshop: Exploring the Design Space of Efficient Deep Neural Networks F Yu, D Stamoulis, D Wang, D Lymberopoulos, X Chen 2020 IEEE/ACM Symposium on Edge Computing (SEC), 317-318, 2020 | 2 | 2020 |
Diana MarculescuThe University of Texas at AustinVerified email at utexas.edu
