| A steep-slope transistor based on abrupt electronic phase transition N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ... Nature communications 6 (1), 1-6, 2015 | 224 | 2015 |
| 14nm ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications Z Krivokapic, U Rana, R Galatage, A Razavieh, A Aziz, J Liu, J Shi, ... 2017 IEEE International Electron Devices Meeting (IEDM), 15.1. 1-15.1. 4, 2017 | 144 | 2017 |
| Physics-based circuit-compatible SPICE model for ferroelectric transistors A Aziz, S Ghosh, S Datta, SK Gupta IEEE Electron Device Letters 37 (6), 805-808, 2016 | 107 | 2016 |
| Nonvolatile memory design based on ferroelectric FETs S George, K Ma, A Aziz, X Li, A Khan, S Salahuddin, MF Chang, S Datta, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 73 | 2016 |
| Device-circuit analysis of ferroelectric FETs for low-power logic S Gupta, M Steiner, A Aziz, V Narayanan, S Datta, SK Gupta IEEE Transactions on Electron Devices 64 (8), 3092-3100, 2017 | 51 | 2017 |
| Enabling energy-efficient nonvolatile computing with negative capacitance FET X Li, J Sampson, A Khan, K Ma, S George, A Aziz, SK Gupta, ... IEEE Transactions on Electron Devices 64 (8), 3452-3458, 2017 | 51 | 2017 |
| Impact of total and partial dipole switching on the switching slope of gate-last negative capacitance FETs with ferroelectric hafnium zirconium oxide gate stack P Sharma, K Tapily, AK Saha, J Zhang, A Shaughnessy, A Aziz, ... VLSI Technology, 2017 Symposium on, 2017 | 51 | 2017 |
| Computing with ferroelectric FETs: Devices, models, systems, and applications A Aziz, ET Breyer, A Chen, X Chen, S Datta, SK Gupta, M Hoffmann, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 44 | 2018 |
| Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits X Yin, A Aziz, J Nahas, S Datta, S Gupta, M Niemier, XS Hu 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 44 | 2016 |
| Advancing nonvolatile computing with nonvolatile NCFET latches and flip-flops X Li, S George, K Ma, WY Tsai, A Aziz, J Sampson, SK Gupta, MF Chang, ... IEEE Transactions on Circuits and Systems I: Regular Papers 64 (11), 2907-2919, 2017 | 39 | 2017 |
| Ag/HfO2based threshold switch with extreme non-linearity for unipolar cross-point memory and steep-slope phase-FETs N Shukla, B Grisafe, RK Ghosh, N Jao, A Aziz, J Frougier, M Jerry, ... 2016 IEEE International Electron Devices Meeting (IEDM), 34.6. 1-34.6. 4, 2016 | 35 | 2016 |
| Phase-transition-FET exhibiting steep switching slope of 8mV/decade and 36% enhanced ON current J Frougier, N Shukla, D Deng, M Jerry, A Aziz, L Liu, G Lavallee, ... 2016 IEEE Symposium on VLSI Technology, 1-2, 2016 | 32 | 2016 |
| Device circuit co design of FEFET based logic for low voltage processors S George, A Aziz, X Li, MS Kim, S Datta, J Sampson, S Gupta, ... 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 649-654, 2016 | 29 | 2016 |
| Ferroelectric transistor based non-volatile flip-flop D Wang, S George, A Aziz, S Datta, V Narayanan, SK Gupta Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 24 | 2016 |
| Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective—Part II A Aziz, N Shukla, S Datta, SK Gupta IEEE Transactions on Electron Devices 64 (3), 1358 - 1365, 2017 | 23 | 2017 |
| Steep Switching Hybrid Phase Transition FETs (Hyper-FET) for Low Power Applications: A Device-Circuit Co-design Perspective–Part I A Aziz, N Shukla, S Datta, SK Gupta IEEE Transactions on Electron Devices 64 (3), 1350-1357, 2017 | 23 | 2017 |
| NCFET based logic for energy harvesting systems S George, A Aziz, X Li, J Sampson, S Datta, S Gupta, V Narayanan SRC TECHCON, 1-4, 2015 | 21 | 2015 |
| Analysis of functional oxide based selectors for cross-point memories A Aziz, N Jao, S Datta, SK Gupta IEEE Transactions on Circuits and Systems I: Regular Papers 63 (12), 2222-2235, 2016 | 15 | 2016 |
| COAST: Correlated material assisted STT MRAMs for optimized read operation A Aziz, N Shukla, S Datta, SK Gupta 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 14 | 2015 |
| Single-ended and differential MRAMs based on spin Hall effect: A layout-aware design perspective A Aziz, W Cane-Wissing, MS Kim, S Datta, V Narayanan, SK Gupta 2015 IEEE Computer Society Annual Symposium on VLSI, 333-338, 2015 | 13 | 2015 |
Sumeet GuptaSchool of Electrical and Computer Engineering, Purdue UniversityVerified email at purdue.edu
