Manoj Sachdev
Manoj Sachdev
Professor of Electrical and Computer Engineering, University of Waterloo
Verified email at uwaterloo.ca
TitleCited byYear
Comparative delay and energy of single edge-triggered and dual edge-triggered pulsed flip-flops for high-performance microprocessors
J Tschanz, S Narendra, Z Chen, S Borkar, M Sachdev, V De
ISLPED'01: Proceedings of the 2001 International Symposium on Low Power …, 2001
2812001
CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test
A Pavlov, M Sachdev
Springer Science & Business Media, 2008
2622008
A digitally programmable delay element: design and analysis
M Maymandi-Nejad, M Sachdev
IEEE transactions on very large scale integration (VLSI) systems 11 (5), 871-878, 2003
1902003
A monotonic digitally controlled delay element
M Maymandi-Nejad, M Sachdev
IEEE Journal of Solid-State Circuits 40 (11), 2212-2219, 2005
1622005
A soft error tolerant 10T SRAM bit-cell with differential read capability
SM Jahinuzzaman, DJ Rennie, M Sachdev
IEEE Transactions on Nuclear Science 56 (6), 3768-3773, 2009
1462009
Impact of self-heating effect on long-term reliability and performance degradation in CMOS circuits
O Semenov, A Vassighi, M Sachdev
IEEE transactions on device and materials reliability 6 (1), 17-27, 2006
1362006
Variation-aware adaptive voltage scaling system
M Elgebaly, M Sachdev
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (5), 560-571, 2007
1252007
Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs
M Sachdev, P Janssen, V Zieren
Proceedings International Test Conference 1998 (IEEE Cat. No. 98CH36270 …, 1998
1171998
Robust and Efficient dynamic voltage scaling for portable devices
I Kang, K Ethirajan, ML Severson, M Elgebaly, M Sachdev, A Fahim
US Patent 7,583,555, 2009
1032009
Deep sub-micron I/sub DDQ/testing: issues and solutions
M Sachdev
Proceedings European Design and Test Conference. ED & TC 97, 271-278, 1997
941997
A method to derive an equation for the oscillation frequency of a ring oscillator
S Docking, M Sachdev
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2003
902003
ESD protection device and circuit design for advanced CMOS technologies
O Semenov, H Sarbishaei, M Sachdev
Springer Science & Business Media, 2008
872008
Thermal and power management of integrated circuits
A Vassighi, M Sachdev
Springer Science & Business Media, 2006
872006
Industrial relevance of analog IFA: A fact or a fiction
M Sachdev, B Atzema
Proceedings of 1995 IEEE International Test Conference (ITC), 61-70, 1995
791995
Defect oriented testing for CMOS analog and digital circuits
M Sachdev
Springer Science & Business Media, 2013
752013
An analytical model for soft error critical charge of nanometric SRAMs
SM Jahinuzzaman, M Sharifkhani, M Sachdev
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (9 …, 2009
702009
Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology
B Chatterjee, M Sachdev
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (11 …, 2005
702005
Low power, testable dual edge triggered flip-flops
RP Llopis, M Sachdev
Proceedings of 1996 International Symposium on Low Power Electronics and …, 1996
701996
A comparative analysis of low-power low-voltage dual-edge-triggered flip-flops
W Chung, T Lo, M Sachdev
IEEE transactions on very large scale integration (VLSI) systems 10 (6), 913-918, 2002
692002
Open defects in CMOS RAM address decoders
M Sachdev
IEEE design & test of computers 14 (2), 26-33, 1997
691997
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