| Automated Selection of Assertions for Bit-Flip Detection During Post-Silicon Validation P Taatizadeh, N Nicolici IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 19 | 2016 |
| Emulation infrastructure for the evaluation of hardware assertions for post-silicon validation P Taatizadeh, N Nicolici IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (6 …, 2017 | 9 | 2017 |
| A methodology for automated design of embedded bit-flips detectors in post-silicon validation P Taatizadeh, N Nicolici 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 73-78, 2015 | 7 | 2015 |
| Emulation-based selection and assessment of assertion checkers for post-silicon validation P Taatizadeh, N Nicolici 2015 33rd IEEE International Conference on Computer Design (ICCD), 46-53, 2015 | 6 | 2015 |
| Automated critical device identification for configurable analogue transistors R Rudolf, P Taatizadeh, R Wilcock, P Wilson 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 858-861, 2012 | 4 | 2012 |
| An automated SAT-based method for the design of on-chip bit-flip detectors P Taatizadeh, N Nicolici 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 101-108, 2017 | 2 | 2017 |
| On Using Hardware Assertion Checkers for Bit-flip Detection in Post-Silicon Validation P Taatizadeh | 2 | 2017 |
| Improving the efficiency of thermoelectric generators by using solar heat concentrators MT de Leon, P Taatizadeh, M Kraft | 2 | 2010 |
| Shu-Mei Tseng Nektarios Tsoutsos Jaynarayan Tudu R. Ubar A Vali, M Mohammad, M Momtaz, N Na, K Namba, V Nelson, K Nepal, ... Journal of Electronic Testing 36, 5-6, 2020 | | 2020 |
| Selection of Post-Silicon Hardware Assertions P Taatizadeh, N Nicolici Post-Silicon Validation and Debug, 179-208, 2019 | | 2019 |
Nicola NicoliciMcMaster UniversityVerified email at ece.mcmaster.ca
