| A capacitor cross-coupled common-gate low-noise amplifier W Zhuo, X Li, S Shekhar, SHK Embabi, JP De Gyvez, DJ Allstot, ... Circuits and Systems II: Express Briefs, IEEE Transactions on 52 (12), 875-879, 2005 | 402 | 2005 |
| G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS X Li, S Shekhar, DJ Allstot IEEE Journal of Solid-State Circuits 40 (12), 2609-2619, 2005 | 400 | 2005 |
| Bandwidth extension techniques for CMOS amplifiers S Shekhar, JS Walling, DJ Allstot IEEE Journal of Solid-State Circuits 41 (11), 2424-2439, 2006 | 357 | 2006 |
| Design considerations for CMOS low-noise amplifiers DJ Allstot, X Li, S Shekhar 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of …, 2004 | 214 | 2004 |
| Wavelength tuning and stabilization of microring-based filters using silicon in-resonator photoconductive heaters H Jayatilleka, K Murray, MÁ Guillén-Torres, M Caverley, R Hu, ... Optics express 23 (19), 25084-25097, 2015 | 116 | 2015 |
| A 4710 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS F O'Mahony, JE Jaussi, J Kennedy, G Balamurugan, M Mansuri, ... IEEE journal of solid-state circuits 45 (12), 2828-2837, 2010 | 108 | 2010 |
| A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS F O'Mahony, J Kennedy, JE Jaussi, G Balamurugan, M Mansuri, ... Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 …, 2010 | 108* | 2010 |
| A scalable 0.128-to-1Tb/s 0.8-to-2.6 pJ/b 64-lane parallel I/O in 32nm CMOS M Mansuri, JE Jaussi, JT Kennedy, TC Hsueh, S Shekhar, ... Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 …, 2013 | 101 | 2013 |
| Strong Injection Locking in Low-LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver S Shekhar, M Mansuri, F O'Mahony, G Balamurugan, JE Jaussi, ... IEEE Transactions on Circuits and Systems I: Regular Papers 56 (8), 1818-1829, 2009 | 78 | 2009 |
| A gm-Boosted Current-Reuse LNA in 0.18μm CMOS JS Walling, S Shekhar, DJ Allstot 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 613-616, 2007 | 65 | 2007 |
| A 27Gb/s forwarded-clock I/O receiver using an injection-locked LC-DCO in 45nm CMOS F O'Mahony, S Shekhar, M Mansuri, G Balamurugan, JE Jaussi, ... 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 57 | 2008 |
| Feedback control for microring weight banks AN Tait, H Jayatilleka, TF De Lima, PY Ma, MA Nahmias, BJ Shastri, ... Optics express 26 (20), 26422-26443, 2018 | 56 | 2018 |
| The future of electrical I/O for microprocessors F O'Mahony, G Balamurugan, JE Jaussi, J Kennedy, M Mansuri, ... 2009 International Symposium on VLSI Design, Automation and Test, 31-34, 2009 | 56 | 2009 |
| A 4–32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS T Musah, J Jaussi, G Balamurugan, S Hyvonen, TC Hsueh, G Keskin, ... IEEE, 2014 | 53 | 2014 |
| A CMOS 3.1-10.6 GHz UWB LNA employing stagger-compensated series peaking S Shekhar, X Li, DJ Allstot IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006, 4 pp., 2006 | 53 | 2006 |
| Silicon photonic circuit design using rapid prototyping foundry process design kits L Chrostowski, H Shoman, M Hammood, H Yun, J Jhoja, E Luan, S Lin, ... IEEE Journal of Selected Topics in Quantum Electronics 25 (5), 1-26, 2019 | 51 | 2019 |
| Crosstalk penalty in microring-based silicon photonic interconnect systems M Bahadori, S Rumley, H Jayatilleka, K Murray, NAF Jaeger, ... Journal of Lightwave Technology 34 (17), 4043-4052, 2016 | 50 | 2016 |
| In-band full duplex broadband power line communications G Prasad, L Lampe, S Shekhar IEEE Transactions on Communications 64 (9), 3915-3931, 2016 | 50 | 2016 |
| A 219-to-231 GHz frequency-multiplier-based VCO with~ 3% peak DC-to-RF efficiency in 65-nm CMOS A Nikpaik, AHM Shirazi, A Nabavi, S Mirabbasi, S Shekhar IEEE Journal of Solid-State Circuits 53 (2), 389-403, 2017 | 47 | 2017 |
| On the design of mm-wave self-mixing-VCO architecture for high tuning-range and low phase noise AHM Shirazi, A Nikpaik, R Molavi, S Lightbody, H Djahanshahi, ... IEEE Journal of Solid-State Circuits 51 (5), 1210-1222, 2016 | 47 | 2016 |
Lukas ChrostowskiElectrical and Computer Engineering, University of British Columbia, V6T 1Z4Verified email at ece.ubc.ca
