Brett H Meyer

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	All	Since 2016
Citations	808	492
h-index	16	12
i10-index	29	20

120

20062007200820092010201120122013201420152016201720182019202020214 6 9 16 15 18 32 35 72 89 91 83 105 114 97 2

Co-authors

Kevin SkadronHarry Douglas Forsyth Professor and Chair of Computer Science, University of VirginiaVerified email at cs.virginia.edu
Mircea R. StanVirginia Microelectronics Consortium (VMEC) Professor, University of VirginiaVerified email at virginia.edu
Runjie ZhangEDA, OracleVerified email at oracle.com
Ke WangUniversity of VirginiaVerified email at virginia.edu
JoAnn M. PaulAssociate Professor of Electrical and Computer Engineering, Virginia TechVerified email at vt.edu
Haibo ZengElectrical & Computer Engineering, Virginia TechVerified email at vt.edu
Zaid Al-bayatiMcGill UniversityVerified email at mail.mcgill.ca
Wei HuangAMD Research, IBM Research, University of Virginia, University of Science and Technology of ChinaVerified email at amd.com
Seyyed Hasan MozafariPh.D. in EngineeringVerified email at mail.mcgill.ca
Dimitrios SoudrisProfessor, Electrical & Computer Eng., National Technical Univ. of AthensVerified email at microlab.ntua.gr
Dimitrios RodopoulosGraphcoreVerified email at graphcore.ai
Zeljko ZilicProfessor of Electrical and Computer EngineeringVerified email at mcgill.ca
Dimitrios StamoulisMicrosoftVerified email at microsoft.com
John LachThe George Washington UniversityVerified email at gwu.edu
Benton CalhounProfessor of Electrical and Computer Engineering, University of VirginiaVerified email at virginia.edu
Qi ZhuAssociate Professor of Electrical Engineering and Computer ScienceVerified email at northwestern.edu
Marco Di NataleFull Professor, TECIP Institute, Scuola Superiore S. AnnaVerified email at sssup.it
Kaushik mazumdarAMD,University of VirginiaVerified email at virginia.edu
Jürgen TeichFull Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-NürnbergVerified email at cs.fau.de
vahid lariUniversity of Erlangen-NurembergVerified email at cs.fau.de

Brett H Meyer

McGill University

Verified email at mcgill.ca - Homepage

Computer architecture electronic design automation fault-tolerance embedded system security machine learning


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Architecture implications of pads as a scarce resource R Zhang, K Wang, BH Meyer, MR Stan, K Skadron 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA …, 2014	66	2014
Power-performance simulation and design strategies for single-chip heterogeneous multiprocessors BH Meyer, JJ Pieper, JAM Paul, JE Nelson, SM Pieper, AG Rowe IEEE transactions on Computers 54 (6), 684-697, 2005	51	2005
Amdahl’s law revisited for single chip systems JAM Paul, BH Meyer International Journal of Parallel Programming 35 (2), 101-123, 2007	45	2007
ArchFP: Rapid prototyping of pre-RTL floorplans GG Faust, R Zhang, K Skadron, MR Stan, BH Meyer 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012	44	2012
A case for lifetime-aware task mapping in embedded chip multiprocessors AS Hartman, DE Thomas, BH Meyer Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2010	43	2010
Neural networks designing neural networks: multi-objective hyper-parameter optimization SC Smithson, G Yang, WJ Gross, BH Meyer Proceedings of the 35th International Conference on Computer-Aided Design, 1-8, 2016	40	2016
Cost-effective slack allocation for lifetime improvement in NoC-based MPSoCs BH Meyer, AS Hartman, DE Thomas 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010	39	2010
Some limits of power delivery in the multicore era R Zhang, BH Meyer, W Huang, K Skadron, MR Stan Proc. WEED, 1-7, 2012	30	2012
A four-mode model for efficient fault-tolerant mixed-criticality systems Z Al-bayati, J Caplan, BH Meyer, H Zeng 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 97-102, 2016	26	2016
Evaluating overheads of multibit soft-error protection in the processor core LG Szafaryn, BH Meyer, K Skadron IEEE Micro 33 (4), 56-65, 2013	26	2013
Temperature-to-power mapping Z Qi, BH Meyer, W Huang, RJ Ribando, K Skadron, MR Stan 2010 IEEE International Conference on Computer Design, 384-389, 2010	26	2010
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC BH Meyer, DE Thomas Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007	21	2007
Stochastic computing can improve upon digital spiking neural networks SC Smithson, K Boga, A Ardakani, BH Meyer, WJ Gross 2016 IEEE International Workshop on Signal Processing Systems (SiPS), 309-314, 2016	19	2016
Developing and validating advanced divertor solutions on DIII-D for next-step fusion devices HY Guo, DN Hill, AW Leonard, SL Allen, PC Stangeby, D Thomas, ... Nuclear Fusion 56 (12), 126010, 2016	19	2016
Cost-effective lifetime and yield optimization for NoC-based MPSoCs BH Meyer, AS Hartman, DE Thomas ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (2 …, 2014	18	2014
Rethinking automated synthesis of MPSoC architectures BH Meyer, DE Thomas 2007 IEEE International Parallel and Distributed Processing Symposium, 1-6, 2007	17	2007
Walking pads: Fast power-supply pad-placement optimization K Wang, BH Meyer, R Zhang, K Skadron, M Stan 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 537-543, 2014	16	2014
Cost-effective safety and fault localization using distributed temporal redundancy BH Meyer, BH Calhoun, J Lach, K Skadron Proceedings of the 14th international conference on Compilers, architectures …, 2011	16	2011
Efficient CMOS invertible logic using stochastic computing SC Smithson, N Onizawa, BH Meyer, WJ Gross, T Hanyu IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2263-2274, 2019	13	2019
Learning recurrent binary/ternary weights A Ardakani, Z Ji, SC Smithson, BH Meyer, WJ Gross arXiv preprint arXiv:1809.11086, 2018	13	2018

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