| Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging S Patnaik, M Ashraf, O Sinanoglu, J Knechtel IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 65 | 2020 |
| Advancing hardware security using polymorphic and stochastic spin-hall effect devices S Patnaik, N Rangarajan, J Knechtel, O Sinanoglu, S Rakheja 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 97-102, 2018 | 60 | 2018 |
| OMLA: An Oracle-Less Machine Learning-Based Attack on Logic Locking L Alrahis, S Patnaik, M Shafique, O Sinanoglu IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1602-1606, 2021 | 52 | 2021 |
| GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists L Alrahis, A Sengupta, J Knechtel, S Patnaik, H Saleh, B Mohammad, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 43 | 2021 |
| GNNUnlock: Graph neural networks-based oracle-less unlocking scheme for provably secure logic locking L Alrahis, S Patnaik, F Khalid, MA Hanif, H Saleh, M Shafique, ... 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 780-785, 2021 | 42 | 2021 |
| Concerted wire lifting: Enabling secure and cost-effective split manufacturing S Patnaik, M Ashraf, H Li, J Knechtel, O Sinanoglu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 40 | 2021 |
| Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices N Rangarajan, S Patnaik, J Knechtel, R Karri, O Sinanoglu, S Rakheja IEEE Transactions on Emerging Topics in Computing 10 (1), 137-156, 2020 | 40 | 2020 |
| Rethinking split manufacturing: An information-theoretic approach with secure layout techniques A Sengupta, S Patnaik, J Knechtel, M Ashraf, S Garg, O Sinanoglu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 329-326, 2017 | 36 | 2017 |
| UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking L Alrahis, S Patnaik, J Knechtel, H Saleh, B Mohammad, M Al-Qutayri, ... IEEE Transactions on Information Forensics and Security 16, 2508-2523, 2021 | 35 | 2021 |
| Protect your chip design intellectual property: An overview J Knechtel, S Patnaik, O Sinanoglu Proceedings of the International Conference on Omni-Layer Intelligent …, 2019 | 32 | 2019 |
| Raise your game for split manufacturing: Restoring the true functionality through BEOL S Patnaik, M Ashraf, J Knechtel, O Sinanoglu Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 32 | 2018 |
| Valkyrie: Vulnerability Assessment Tool and Attack for Provably-Secure Logic Locking Techniques N Limaye, S Patnaik, O Sinanoglu IEEE Transactions on Information Forensics and Security 17, 744-759, 2022 | 29 | 2022 |
| 2.5 D root of trust: Secure system-level integration of untrusted chiplets M Nabeel, M Ashraf, S Patnaik, V Soteriou, O Sinanoglu, J Knechtel IEEE Transactions on Computers 69 (11), 1611-1625, 2020 | 28 | 2020 |
| Security promises and vulnerabilities in emerging reconfigurable nanotechnology-based circuits S Rai, S Patnaik, A Rupani, J Knechtel, O Sinanoglu, A Kumar IEEE Transactions on Emerging Topics in Computing 10 (2), 763-778, 2020 | 27 | 2020 |
| Attacking split manufacturing from a deep learning perspective H Li, S Patnaik, A Sengupta, H Yang, J Knechtel, B Yu, EFY Young, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 27 | 2019 |
| UNTANGLE: Unlocking routing and logic obfuscation using graph neural networks-based link prediction L Alrahis, S Patnaik, MA Hanif, M Shafique, O Sinanoglu 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 26 | 2021 |
| Muxlink: Circumventing learning-resilient mux-locking using graph neural network-based link prediction L Alrahis, S Patnaik, M Shafique, O Sinanoglu 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 694-699, 2022 | 25 | 2022 |
| A modern approach to IP protection and trojan prevention: Split manufacturing for 3D ICs and obfuscation of vertical interconnects S Patnaik, M Ashraf, O Sinanoglu, J Knechtel IEEE Transactions on Emerging Topics in Computing 9 (4), 1815-1834, 2019 | 24 | 2019 |
| Fa-SAT: Fault-aided SAT-based attack on compound logic locking techniques N Limaye, S Patnaik, O Sinanoglu 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 22 | 2021 |
| GNNUnlock+: A systematic methodology for designing graph neural networks-based oracle-less unlocking schemes for provably secure logic locking L Alrahis, S Patnaik, MA Hanif, H Saleh, M Shafique, O Sinanoglu IEEE Transactions on Emerging Topics in Computing 10 (3), 1575-1592, 2021 | 21 | 2021 |
Ozgur SinanogluProfessor of Electrical and Computer Engineering, New York University Abu DhabiVerified email at nyu.edu
