Huseyin Ekin Sumbul
Title
Cited by
Cited by
Year
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing
Q Zhu, B Akin, HE Sumbul, F Sadi, JC Hoe, L Pileggi, F Franchetti
2013 IEEE international 3D systems integration conference (3DIC), 1-7, 2013
1222013
Building trusted ICs using split fabrication
K Vaidyanathan, BP Das, HE Sumbul, R Liu, L Pileggi
Hardware-Oriented Security and Trust (HOST), 2014
117*2014
Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware
Q Zhu, T Graf, HE Sumbul, L Pileggi, F Franchetti
2013 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2013
792013
Efficient and Secure Intellectual Property (IP) Design with Split Fabrication
K Vaidyanathan, R Liu, HE Sumbul, Q Zhu, F Franchetti, L Pileggi
Hardware-Oriented Security and Trust (HOST), 2014
692014
A 4096‐neuron 1M‐synapse 3.8pJ/SOP Spiking Neural Network with On‐chip STDP Learning and Sparse Weights in 10nm FinFET CMOS
GK Chen, R Kumar, HE Sumbul, P Knag, RK Krishnamurthy
IEEE VLSI Circuits, 2018, 2018
492018
Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs
E Nurvitadhi, D Kwon, A Jafari, A Boutros, J Sim, P Tomson, H Sumbul, ...
27th IEEE International Symposium On Field-Programmable Custom Computing …, 2019
162019
Fast smith-waterman hardware implementation
Z Nawaz, K Bertels, HE Sümbül
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
162010
All-magnetic magnetoresistive random access memory based on four terminal mCell device
DM Bromberg, HE Sumbul, JG Zhu, L Pileggi
Journal of Applied Physics 117 (17), 17B510, 2015
122015
A 617TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS
PC Knag, GK Chen, HE Sumbul, R Kumar, MA Anders, H Kaul, SK Hsu, ...
2020 Symposia on VLSI Technology and Circuits, 2020
42020
A synthesis methodology for application-specific logic-in-memory designs
HE Sumbul, K Vaidyanathan, Q Zhu, F Franchetti, L Pileggi
2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015
42015
Evaluating and Enhancing Intel Stratix 10 FPGAs for Persistent Real-Time AI
E Nurvitadhi, D Kwon, A Jafari, A Boutros, J Sim, P Tomson, H Sumbul, ...
27th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2019
32019
Bitcell wth magnetic switching elements
L Pileggi, DM Bromberg, HE Sumbul
US Patent 9,524,767, 2016
22016
A 2.9–33.0 TOPS/W Reconfigurable 1-D/2-D Compute-Near-Memory Inference Accelerator in 10-nm FinFET CMOS
HE Sumbul, GK Chen, PC Knag, R Kumar, MA Anders, H Kaul, SK Hsu, ...
IEEE Solid-State Circuits Letters 3, 118-121, 2020
12020
Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS
S Hsu, A Agarwal, S Realov, M Anders, G Chen, M Kar, R Kumar, ...
2020 Symposia on VLSI Technology and Circuits, 2020
12020
Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS
A Agarwal, S Hsu, S Realov, M Anders, G Chen, M Kar, R Kumar, ...
International Solid-State Circuits Conference, 2020
12020
A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS
R Kumar, GK Chen, HE Sumbul, PC Knag, MA Anders, H Kaul, SK Hsu, ...
IEEE Solid-State Circuits Letters 3, 338-341, 2020
2020
A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications
M Kar, A Agarwal, S Hsu, D Moloney, G Chen, R Kumar, H Sumbul, ...
2020 Symposia on VLSI Technology and Circuits, 2020
2020
Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range
MA Anders, H Kaul, S Kim, GK Chen, R Kumar, HE Sumbul, PC Knag, ...
International Solid-State Circuits Conference, 2020
2020
Spin Hall Driven All-Magnetic Memory Arrays Based on Four Terminal mCell Device
D Bromberg, HE Sumbul, MT Moneck, VM Sokalski, L Pileggi, J Zhu
2015 International Magnetics Conference (INTERMAG), 2015
2015
A Novel Design Methodology for Synthesizing Application-Specific Logic-in-Memory Blocks
HE Sumbul
Carnegie Mellon University, 2015
2015
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Articles 1–20