Satish Grandhi
Satish Grandhi
Staff Engineer, Qualcomm
Verified email at qti.qualcomm.com - Homepage
TitleCited byYear
Linear compositional delay model for the timing analysis of sub-powered combinational circuits
J Chen, C Spagnol, S Grandhi, E Popovici, S Cotofana, A Amaricai
2014 IEEE Computer Society Annual Symposium on VLSI, 380-385, 2014
152014
Microelectromechanical torsional varactors with low parasitic capacitances and high dynamic range
C Venkatesh, N Bhat, KJ Vinoy, S Grandhi
Journal of Micro/Nanolithography, MEMS, and MOEMS 11 (1), 013006, 2012
62012
Inverse Gaussian distribution based timing analysis of Sub-threshold CMOS circuits
J Chen, S Cotofana, S Grandhi, C Spagnol, E Popovici
Microelectronics Reliability 55 (12), 2754-2761, 2015
52015
ROST-C: Reliability driven optimisation and synthesis techniques for combinational circuits
S Grandhi, D McCarthy, C Spagnol, E Popovici, S Cotofana
2015 33rd IEEE International Conference on Computer Design (ICCD), 431-434, 2015
52015
Reliability analysis of logic circuits using probabilistic techniques
S Grandhi, C Spagnol, E Popovici
2014 10th Conference on Ph. D. Research in Microelectronics and Electronics …, 2014
52014
CPE: Codeword Prediction Encoder
S Grandhi, E Dupraz, C Spagnol, V Savin, E Popovici
2016 21th IEEE European Test Symposium (ETS), 1-2, 2016
32016
Practical LDPC encoders robust to hardware errors
DD Elsa Dupraz, Valentin Savin, Satish Grandhi, Emanuel Popovici
Communications (ICC), 2016 IEEE International Conference on, 2016
2*2016
Reliability aware logic synthesis through rewriting
S Grandhi, C Spagnol, J Chen, E Popovici, S Cotafona
2014 27th IEEE International System-on-Chip Conference (SOCC), 274-279, 2014
22014
An EDA Framework for Reliability Estimation and Optimization of Combinational Circuits
S Grandhi, B Yang, C Spagnol, S Gupta, E Popovici
Journal of Low Power Electronics 12 (3), 242-258, 2016
12016
An approach for digital Circuit Error/Reliability Propagation Analysis based on Conditional Probability
B Yang, S Grandhi, C Spagnol, E Popovici, S Cotofana
2016 27th Irish Signals and Systems Conference (ISSC), 1-6, 2016
12016
Reliable chip design from low powered unreliable components
SK Grandhi
University College Cork, 2019
2019
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Articles 1–11