Richard M. Yoo
Richard M. Yoo
Software Engineer, Google Inc.
Verified email at google.com - Homepage
Title
Cited by
Cited by
Year
Phoenix rebirth: Scalable MapReduce on a large-scale shared-memory system
RM Yoo, A Romano, C Kozyrakis
2009 IEEE International Symposium on Workload Characterization (IISWC), 198-207, 2009
3562009
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing
RM Yoo, CJ Hughes, K Lai, R Rajwar
Proceedings of the International Conference on High Performance Computing …, 2013
3142013
Phoenix++ modular mapreduce for shared-memory systems
J Talbot, RM Yoo, C Kozyrakis
Proceedings of the second international workshop on MapReduce and its …, 2011
2662011
Adaptive transaction scheduling for transactional memory systems
RM Yoo, HHS Lee
Proceedings of the twentieth annual symposium on Parallelism in algorithms …, 2008
2542008
Flexible architectural support for fine-grain scheduling
D Sanchez, RM Yoo, C Kozyrakis
ACM SIGARCH Computer Architecture News 38 (1), 311-322, 2010
1742010
Kicking the tires of software transactional memory: why the going gets tough
RM Yoo, Y Ni, A Welc, B Saha, AR Adl-Tabatabai, HHS Lee
Proceedings of the twentieth annual symposium on Parallelism in algorithms …, 2008
1132008
Dynamic fine-grain scheduling of pipeline parallelism
D Sanchez, D Lo, RM Yoo, J Sugerman, C Kozyrakis
2011 International Conference on Parallel Architectures and Compilation …, 2011
672011
Constructing a non-linear model with neural networks for workload characterization
RM Yoo, H Lee, K Chow, SL Hsien-hsin
2006 IEEE International Symposium on Workload Characterization, 150-159, 2006
472006
Locality-aware task management for unstructured parallelism: A quantitative limit study
RM Yoo, CJ Hughes, C Kim, YK Chen, C Kozyrakis
Proceedings of the twenty-fifth annual ACM symposium on Parallelism in …, 2013
412013
Accelerating a quiescence process of transactional memory
Y Ni, RM Yoo, AW Welc, B Saha, AR Adl-Tabatabai
US Patent App. 12/198,820, 2010
212010
Method and apparatus for selecting cache locality for atomic operations
CJ Hughes, D Kim, CA Moreno, JS Park, RM Yoo
US Patent 9,250,914, 2016
172016
Location-aware cache management for many-core processors with deep cache hierarchy
J Park, RM Yoo, DS Khudia, CJ Hughes, D Kim
SC'13: Proceedings of the International Conference on High Performance …, 2013
172013
A digital rights enabled graphics processing system
W Shi, HHS Lee, RM Yoo, A Boldyreva
Graphics Hardware, 17-26, 2006
172006
Accelerating a quiescence process of transactional memory
Y Ni, RM Yoo, AW Welc, B Saha, AR Adl-Tabatabai
US Patent App. 12/198,852, 2010
162010
Helper transactions: Enabling thread-level speculation via a transactional memory system
RM Yoo, HHS Lee
2008 Workshop on Parallel Execution of Sequential Programs on Multi-core …, 2008
132008
Monitoring vector lane duty cycle for dynamic optimization
D Kim, JS Park, DH Woo, RM Yoo, CJ Hughes
US Patent 9,323,525, 2016
112016
Hierarchical means: Single number benchmarking with workload cluster analysis
RM Yoo, HHS Lee, H Lee, K Chow
2007 IEEE 10th International Symposium on Workload Characterization, 204-213, 2007
112007
Object liveness tracking for use in processing device cache
CJ Hughes, D Kim, JS Park, RM Yoo, G Bikshandi
US Patent 9,740,623, 2017
42017
Early experience on transactional execution of java tm programs using intelrg transactional synchronization extensions
RM Yoo, S Viswanathan, VR Deshpande, CJ Hughes, S Aundhe
Proc. TRANSACT 9th ACM SIGPLAN Workshop Trans. Comput., 2014
42014
Locality-Aware Task Management on Many-Core Processors
RM Yoo
Stanford University, 2012
42012
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