| An efficient hardware architecture for template matching-based spike sorting D Valencia, A Alimohammad IEEE transactions on biomedical circuits and systems 13 (3), 481-492, 2019 | 38 | 2019 |
| A real-time spike sorting system using parallel OSort clustering D Valencia, A Alimohammad IEEE transactions on biomedical circuits and systems 13 (6), 1700-1713, 2019 | 32 | 2019 |
| Frameworks for efficient brain-computer interfacing D Valencia, J Thies, A Alimohammad IEEE Transactions on Biomedical Circuits and Systems 13 (6), 1714-1722, 2019 | 23 | 2019 |
| An artificial neural network processor with a custom instruction set architecture for embedded applications D Valencia, SF Fard, A Alimohammad IEEE Transactions on circuits and systems I: regular papers 67 (12), 5200-5210, 2020 | 16 | 2020 |
| Neural spike sorting using binarized neural networks D Valencia, A Alimohammad IEEE Transactions on Neural Systems and Rehabilitation Engineering 29, 206-214, 2020 | 14 | 2020 |
| High‐throughput and compact FFT architectures using the Good–Thomas and Winograd algorithms N Bhagat, D Valencia, A Alimohammad, F Harris IET Communications 12 (8), 1011-1018, 2018 | 8 | 2018 |
| In vivo neural spike detection with adaptive noise estimation D Valencia, PP Mercier, A Alimohammad Journal of neural engineering 19 (4), 046018, 2022 | 7 | 2022 |
| Compact and high‐throughput parameterisable architectures for memory‐based FFT algorithms D Valencia, A Alimohammad IET Circuits, Devices & Systems 13 (5), 696-703, 2019 | 5 | 2019 |
| A generalized hardware architecture for real-time spiking neural networks D Valencia, A Alimohammad Neural Computing and Applications 35 (24), 17821-17835, 2023 | 3 | 2023 |
| Towards in vivo neural decoding D Valencia, A Alimohammad Biomedical Engineering Letters 12 (2), 185-195, 2022 | 3 | 2022 |
| High‐throughput and compact reconfigurable architectures for recursive filters V Shinde, G Jai Kumar, D Valencia, A Alimohammad IET Communications 12 (13), 1616-1623, 2018 | 3 | 2018 |
| Partially binarized neural networks for efficient spike sorting D Valencia, A Alimohammad Biomedical Engineering Letters 13 (1), 73-83, 2023 | 2 | 2023 |
| Power-efficient in vivo brain-machine interfaces via brain-state estimation D Valencia, G Leone, N Keller, PP Mercier, A Alimohammad Journal of neural engineering 20 (1), 016032, 2023 | 1 | 2023 |
| Efficient In Vivo Neural Signal Compression Using an Autoencoder-based Neural Network D Valencia, PP Mercier, A Alimohammad IEEE Transactions on Biomedical Circuits and Systems, 2024 | | 2024 |
| Design and Implementation of Hardware Architectures for Neural Signal Processing D Valencia San Diego State University, 2019 | | 2019 |
Amir AlimohammadProfessor of Electrical and Computer Engineering, San Diego State UniversityVerified email at sdsu.edu
