Daniel Grosse

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	All	Since 2016
Citations	3027	1516
h-index	31	17
i10-index	72	47

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200320042005200620072008200920102011201220132014201520162017201820192020202113 8 34 43 50 88 128 199 161 176 185 215 176 209 221 234 331 463 57

Co-authors

Rolf DrechslerProfessor at University of Bremen, Director DFKI Bremen, Germany Verified email at uni-bremen.de
Robert WilleJohannes Kepler University LinzVerified email at jku.at
Hoang M. LeUniversity of BremenVerified email at informatik.uni-bremen.de
Ulrich KühneTélécom ParisTechVerified email at telecom-paristech.fr
Gerhard W DueckProfessor of Computer Science, University of New BrunswickVerified email at unb.ca
Mathias SoekenMicrosoft, EPFLVerified email at epfl.ch
Arun ChandrasekharanGraduate Student, Group of Computer Architecture, University of Bremen, GermanyVerified email at cs.uni-bremen.de
Goerschwin FeyHamburg University of TechnologyVerified email at tuhh.de
Marcel WalterPh.D. Student, University of BremenVerified email at uni-bremen.de
Frank Sill Torres; Frank Sill; FS Torres;...German Aerospace Center (DLR) / Institute for the Protection of Maritime InfrastructuresVerified email at ufmg.br
Stefan FrehseVerified email at mailbox.org
Saman FröhlichUniversität Bremen, AGRAVerified email at uni-bremen.de
Alireza MahzoonUniversity of BremenVerified email at informatik.uni-bremen.de
Amr Sayed-AhmedResearch Fellow at NTUVerified email at ntu.edu.sg
Melanie DiepenbeckResearcher, Bremen UniversityVerified email at informatik.uni-bremen.de
Muhammad HassanUniversity of BremenVerified email at uni-bremen.de
Stephan EggersglüßMentor, A Siemens BusinessVerified email at mentor.com
Mehran GoliPhD - Computer Science , University of BremenVerified email at uni-bremen.de
David Michael MillerProfessor Emeritus of Computer Science, University of VictoriaVerified email at uvic.ca
Anne E. HaxthausenAssociate Professor of Computer Science, Technical University of DenmarkVerified email at dtu.dk

Daniel Grosse

Full Professor at Johannes Kepler University Linz

Verified email at jku.at - Homepage

embedded systems virtual prototyping verification synthesis RISC-V


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RevLib: An online resource for reversible functions and reversible circuits R Wille, D Große, L Teuber, GW Dueck, R Drechsler 38th International Symposium on Multiple Valued Logic (ismvl 2008), 220-225, 2008	362	2008
Exact multiple-control toffoli network synthesis with SAT techniques D Große, R Wille, GW Dueck, R Drechsler IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009	190	2009
Proving transaction and system-level properties of untimed SystemC TLM designs D Große, HM Le, R Drechsler Eighth ACM/IEEE International Conference on Formal Methods and Models for …, 2010	88	2010
Equivalence checking of reversible circuits R Wille, D Große, DM Miller, R Drechsler 2009 39th International Symposium on Multiple-Valued Logic, 324-330, 2009	84	2009
Formal verification of integer multipliers by combining Gröbner basis with logic reduction A Sayed-Ahmed, D Große, U Kühne, M Soeken, R Drechsler 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016	66	2016
HW/SW co-verification of embedded systems using bounded model checking D Groβe, U Kühne, R Drechsler Proceedings of the 16th ACM Great Lakes symposium on VLSI, 43-48, 2006	63	2006
SWORD: A SAT like prover using word level information R Wille, G Fey, D Große, S Eggersglüß, R Drechsler VLSI-SoC: Advanced Topics on Systems on a Chip, 1-17, 2009	57	2009
Quantified synthesis of reversible logic R Wille, HM Le, GW Dueck, D Große 2008 Design, Automation and Test in Europe, 1015-1020, 2008	57	2008
Fast exact Toffoli network synthesis of reversible logic R Wille, D Große 2007 IEEE/ACM International Conference on Computer-Aided Design, 60-64, 2007	56	2007
Formal verification of LTL formulas for SystemC designs D Große, R Drechsler Proceedings of the 2003 International Symposium on Circuits and Systems …, 2003	56	2003
Exact SAT-based Toffoli network synthesis D Große, X Chen, GW Dueck, R Drechsler Proceedings of the 17th ACM Great Lakes symposium on VLSI, 96-101, 2007	53	2007
Reachability analysis for formal verification of SystemC R Drechsler, D Große Proceedings Euromicro Symposium on Digital System Design. Architectures …, 2002	53	2002
Quality-Driven SystemC Design D Große, R Drechsler Springer, 2010	50	2010
Verifying SystemC using an intermediate verification language and symbolic simulation HM Le, D Große, V Herdt, R Drechsler Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013	49	2013
Reversible logic synthesis with output permutation R Wille, D Große, GW Dueck, R Drechsler 2009 22nd International Conference on VLSI Design, 189-194, 2009	49	2009
ParSyC: an efficient SystemC parser G Fey, D Große, T Cassens, C Genz, T Warode, R Drechsler In Workshop on Synthesis And System Integration of Mixed Information …, 2004	47	2004
Exact synthesis of elementary quantum gate circuits for reversible functions with don't cares D Große, R Wille, GW Dueck, R Drechsler 38th International Symposium on Multiple Valued Logic (ismvl 2008), 214-219, 2008	46	2008
CheckSyC: An efficient property checker for RTL SystemC designs D Große, R Drechsler 2005 IEEE International Symposium on Circuits and Systems, 4167-4170, 2005	46	2005
WoLFram-a word level framework for formal verification A Sülflow, U Kühne, G Fey, D Grosse, R Drechsler 2009 IEEE/IFIP International Symposium on Rapid System Prototyping, 11-17, 2009	44	2009
BDD minimization for approximate computing M Soeken, D Große, A Chandrasekharan, R Drechsler 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 474-479, 2016	43	2016

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