Nonvolatile memory device and related programming method KT Park, MG Kang US Patent 8,300,463, 2012 | 393 | 2012 |
Three-dimensional NAND flash architecture design based on single-crystalline stacked array Y Kim, JG Yun, SH Park, W Kim, JY Seo, M Kang, KC Ryoo, JH Oh, ... IEEE Transactions on Electron Devices 59 (1), 35-45, 2011 | 311 | 2011 |
A zeroing cell-to-cell interference page architecture with temporary LSB storing and parallel MSB program scheme for MLC NAND flash memories KT Park, M Kang, D Kim, SW Hwang, BY Choi, YT Lee, C Kim, K Kim IEEE Journal of Solid-State Circuits 43 (4), 919-928, 2008 | 212 | 2008 |
Floating body semiconductor memory device and method of operating the same D Kim, D Park, K Myoung-Gon US Patent 7,539,041, 2009 | 94 | 2009 |
A simple parameter extraction method of spiral on-chip inductors M Kang, J Gil, H Shin IEEE Transactions on Electron Devices 52 (9), 1976-1981, 2005 | 79 | 2005 |
Multi-Level Analog Resistive Switching Characteristics in Tri-Layer HfO2/Al2O3/HfO2 Based Memristor on ITO Electrode C Mahata, M Kang, S Kim Nanomaterials 10 (10), 2069, 2020 | 55 | 2020 |
Natural local self-boosting effect in 3D NAND flash memory M Kang, Y Kim IEEE Electron Device Letters 38 (9), 1236-1239, 2017 | 51 | 2017 |
Prediction of process variation effect for ultrascaled GAA vertical FET devices using a machine learning approach K Ko, JK Lee, M Kang, J Jeon, H Shin IEEE Transactions on Electron Devices 66 (10), 4474-4477, 2019 | 48 | 2019 |
Down-coupling phenomenon of floating channel in 3D NAND flash memory Y Kim, M Kang IEEE Electron Device Letters 37 (12), 1566-1569, 2016 | 47 | 2016 |
Activation Energies of Failure Mechanisms in Advanced NAND Flash Cells for Different Generations and Cycling K Lee, M Kang, S Seo, D Kang, S Kim, DH Li, H Shin IEEE transactions on electron devices 60 (3), 1099-1107, 2013 | 47 | 2013 |
Analysis of Failure Mechanisms and Extraction of Activation Energies in 21-nm nand Flash Cells K Lee, M Kang, S Seo, DH Li, J Kim, H Shin IEEE Electron Device Letters 34 (1), 48-50, 2012 | 47 | 2012 |
A 45nm 4Gb 3-dimensional double-stacked multi-level NAND flash memory with shared bitline structure KT Park, D Kim, S Hwang, M Kang, H Cho, Y Jeong, YI Seo, J Jang, ... 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 43 | 2008 |
Flash memory device having row decoders sharing single high voltage level shifter, system including the same, and associated methods K Myoung-Gon, YT Lee, K Park, D Kim US Patent 7,940,578, 2011 | 42 | 2011 |
Non-volatile memory devices and methods of erasing non-volatile memory devices P Kitae, D Kim, M Kim, H Kim US Patent 8,018,782, 2011 | 39 | 2011 |
The compact modeling of channel potential in sub-30-nm NAND flash cell string M Kang, K Lee, DH Chae, BG Park, H Shin IEEE electron device letters 33 (3), 321-323, 2012 | 37 | 2012 |
Flash memory devices with memory cells strings including dummy transistors with selective threshold voltages MG Kang, P Kitae US Patent 8,089,811, 2012 | 37 | 2012 |
Three-dimensional NAND flash memory based on single-crystalline channel stacked array Y Kim, M Kang, SH Park, BG Park IEEE electron device letters 34 (8), 990-992, 2013 | 35 | 2013 |
An accurate compact model considering direct-channel interference of adjacent cells in sub-30-nm NAND flash technologies M Kang, IH Park, IJ Chang, K Lee, S Seo, BG Park, H Shin IEEE electron device letters 33 (8), 1114-1116, 2012 | 33 | 2012 |
Flash memory device and memory system K Park, MG Kang US Patent App. 12/509,611, 2010 | 33 | 2010 |
Improving read disturb characteristics by self-boosting read scheme for multilevel NAND flash memories M Kang, KT Park, Y Song, S Hwang, BY Choi, Y Song, YT Lee, C Kim Japanese Journal of Applied Physics 48 (4S), 04C062, 2009 | 32 | 2009 |