| Method for making stacked and borderless via structures for multilevel metal interconnections on semiconductor substrates BY Tsui US Patent 5,891,799, 1999 | 149 | 1999 |
| Wide range work function modulation of binary alloys for MOSFET application BY Tsui, CF Huang IEEE Electron Device Letters 24 (3), 153-155, 2003 | 147 | 2003 |
| High-performance poly-silicon TFTs using HfO/sub 2/gate dielectric CP Lin, BY Tsui, MJ Yang, RH Huang, CH Chien IEEE electron device letters 27 (5), 360-363, 2006 | 79 | 2006 |
| Formation of interfacial layer during reactive sputtering of hafnium oxide BY Tsui, HW Chang Journal of applied physics 93 (12), 10119-10124, 2003 | 74 | 2003 |
| A novel 25-nm modified Schottky-barrier FinFET with high performance BY Tsui, CP Lin IEEE Electron Device Letters 25 (6), 430-432, 2004 | 65 | 2004 |
| Anisotropic thermal conductivity of nanoporous silica film BY Tsui, CC Yang, KL Fang IEEE Transactions on Electron Devices 51 (1), 20-27, 2004 | 58 | 2004 |
| Band engineering to improve average subthreshold swing by suppressing low electric field band-to-band tunneling with epitaxial tunnel layer tunnel FET structure PY Wang, BY Tsui IEEE Transactions on Nanotechnology 15 (1), 74-79, 2015 | 57 | 2015 |
| Save MOS device BY Tsui US Patent 6,489,204, 2002 | 55 | 2002 |
| A comprehensive study on the FIBL of nanoscale MOSFETs BY Tsui, LF Chin IEEE Transactions on electron devices 51 (10), 1733-1736, 2004 | 49 | 2004 |
| Mechanism of Schottky barrier height modulation by thin dielectric insertion on n-type germanium BY Tsui, MH Kao Applied Physics Letters 103 (3), 2013 | 43 | 2013 |
| Process and characteristics of modified Schottky barrier (MSB) p-channel FinFETs BY Tsui, CP Lin IEEE transactions on electron devices 52 (11), 2455-2462, 2005 | 43 | 2005 |
| Method for increasing the capacity of an integrated circuit device CT Lee, CC Lee, BY Tsui US Patent 6,759,305, 2004 | 43 | 2004 |
| Effects of nitrogen ion implantation on the formation of nickel silicide contacts on shallow junctions LW Cheng, SL Cheng, JY Chen, LJ Chen, BY Tsui Thin Solid Films 355, 412-416, 1999 | 43 | 1999 |
| Modeling the Impact of Random Grain Boundary Traps on the Electrical Behavior of Vertical Gate 3-D NAND Flash Memory Devices YH Hsiao, HT Lue, WC Chen, KP Chang, YH Shih, BY Tsui, KY Hsieh, ... IEEE Transactions on Electron Devices 61 (6), 2064-2070, 2014 | 40 | 2014 |
| Epitaxial Tunnel Layer Structure for P-Channel Tunnel FET Improvement PY Wang, BY Tsui IEEE Transactions on Electron Devices 60 (12), 4098-4104, 2013 | 39 | 2013 |
| Two-frequency CV correction using five-element circuit model for high-k gate dielectric and ultrathin oxide WH Wu, BY Tsui, YP Huang, FC Hsieh, MC Chen, YT Hou, Y Jin, HJ Tao, ... IEEE electron device letters 27 (5), 399-401, 2006 | 39 | 2006 |
| Electrical instability of low-dielectric constant diffusion barrier film (a-SiC: H) for copper interconnect BY Tsui, KL Fang, SD Lee IEEE Transactions on Electron Devices 48 (10), 2375-2383, 2001 | 38 | 2001 |
| Method for making stacked and borderless via structures on semiconductor substrates for integrated circuits BY Tsui US Patent 6,225,211, 2001 | 38 | 2001 |
| Method for reduction of reverse short channel effect in MOSFET BY Tsui US Patent 5,792,699, 1998 | 36 | 1998 |
| Metal drift induced electrical instability of porous low dielectric constant film KL Fang, BY Tsui Journal of applied physics 93 (9), 5546-5550, 2003 | 35 | 2003 |
