Lluís Vilanova
Title
Cited by
Cited by
Year
Predictive runtime code scheduling for heterogeneous architectures
VJ Jiménez, L Vilanova, I Gelado, M Gil, G Fursin, N Navarro
International Conference on High-Performance Embedded Architectures and …, 2009
1692009
Didi: Mitigating the performance impact of tlb shootdowns using a shared tlb directory
C Villavieja, V Karakostas, L Vilanova, Y Etsion, A Ramirez, A Mendelson, ...
International Conference on Parallel Architectures and Compilation …, 2011
1182011
The low power architecture approach towards exascale computing
N Rajovic, L Vilanova, C Villavieja, N Puzovic, A Ramirez
Journal of Computational Science 4 (6), 439-443, 2013
1032013
The low-power architecture approach towards exascale computing
N Rajovic, N Puzovic, L Vilanova, C Villavieja, A Ramirez
Workshop on Scalable Algorithms for Large-Scale Systems (ScalA), 2011
1032011
CODOMs: Protecting software with code-centric memory domains
L Vilanova, M Ben-Yehuda, N Navarro, Y Etsion, M Valero
International Symposium on Computer Architecture (ISCA), 469-480, 2014
512014
Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures
L Alvarez, L Vilanova, M Moreto, M Casas, M Gonzàlez, X Martorell, ...
International Symposium on Computer Architecture (ISCA), 720-732, 2015
292015
Automatic parallelization of kernels in shared-memory multi-GPU nodes
J Cabezas, L Vilanova, I Gelado, TB Jablin, N Navarro, WW Hwu
International Conference on Supercomputing, 3-13, 2015
232015
Comparison based sorting for systems with multiple GPUs
I Tanasic, L Vilanova, M Jordà, J Cabezas, I Gelado, N Navarro, W Hwu
Workshop on General Purpose Processor Using Graphics Processing Units (GPGPU …, 2013
212013
Hardware–Software Coherence Protocol for the Coexistence of Caches and Local Memories
L Alvarez, L Vilanova, M Gonzalez, X Martorell, N Navarro, E Ayguade
IEEE Transactions on Computers 64 (1), 152-165, 2015
202015
Hardware/Software Coherence Protocol for the Coexistence of Caches and Local Memories
L Alvarez, L Vilanova, M Gonzàlez, X Martorell, N Navarro, E Ayguadé
International Conference for High Performance Computing, Networking, Storage …, 2012
202012
Direct Inter-Process Communication (dIPC): Repurposing the CODOMs Architecture to Accelerate IPC
L Vilanova, M Jordà, N Navarro, Y Etsion, M Valero
European Conference on Computer Systems (EuroSys), 16-31, 2017
152017
Automatic execution of single-GPU computations across multiple GPUs
J Cabezas, L Vilanova, I Gelado, TB Jablin, N Navarro, W Hwu
International Conference on Parallel Architectures and Compilation …, 2014
132014
Building a global system view for optimization purposes
R Bertran, M Gil, J Cabezas, V Jimenez, L Vilanova, E Morancho, ...
Proceedings of Workshop on the Interaction between Operating Systems and …, 2006
102006
Logical-to-physical block mapping inside the disk controller: accessing data objects without operating system intervention
Y Etsion, Y Gottesman, L Vilanova
US Patent App. 10/331,591, 2019
9*2019
Using SMT to accelerate nested virtualization
L Vilanova, N Amit, Y Etsion
International Symposium on Computer Architecture (ISCA), 2019
62019
Logical-to-physical block mapping inside the disk controller: accessing data objects without operating system intervention
Y Etsion, Y Gottesman, L Vilanova
US Patent 10,331,591, 2019
52019
DATS-Data Containers for Web Applications
C Hunger, L Vilanova, C Papamanthou, Y Etsion, M Tiwari
International Conference on Architectural Support for Programming Languages …, 2018
52018
The cost of IPC: an architectural analysis
I Gelado, J Cabezas, L Vilanova, N Navarro
Workshop on the Interaction between Operating Systems and Computer …, 2007
42007
Auto-tuning of data communication on heterogeneous systems
M Jorda, I Tanasic, J Cabezas, L Vilanova, I Gelado, N Navarro
International Symposium on Embedded Multicore Socs (McSoC), 135-140, 2013
22013
Caladan: a distributed meta-OS for data center disaggregation
L Vilanova, L Maudlej, M Hille, N Asmussen, M Roitzsch, M Silberstein
1
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Articles 1–20