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Sourav Das
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Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3D Small-world Network-on-Chip
S Das, JR Doppa, PP Pande, K Chakrabarty
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
842017
Optimizing 3D NoC design for energy efficiency: A machine learning approach
S Das, JR Doppa, DH Kim, PP Pande, K Chakrabarty
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 705-712, 2015
692015
Performance and Thermal Trade-Offs for Energy Efficient Monolithic 3D Network-on-Chip
D Lee, S Das, JR Doppa, PP Pande, K Chakrabarty
To appear in ACM Transaction on Design and Automation of Electronic System …, 2018
472018
Monolithic 3D-enabled High Performance and Energy Efficient Network-on-Chip
S Das, JR Doppa, PP Pande, K Chakravarty
35th IEEE International Conference on Computer Design, 2017, 233-240, 2017
412017
Automated detection of optic disc and blood vessel in retinal image using morphological, edge detection and feature extraction technique
NC Mithun, S Das, SA Fattah
International Conference Computer and Information Technology (ICCIT), 98-102, 2014
272014
Energy-Efficient and Reliable 3D Network-on-Chip (NoC): Architectures and Optimization Algorithms
S Das, JR Doppa, PP Pande, K Chakrabarty
Computer-Aided Design (ICCAD), 2016 IEEE/ACM International Conference on, 1-6, 2016
222016
Small-world network enabled energy efficient and robust 3D NoC architectures
S Das, D Lee, DH Kim, PP Pande
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 133-138, 2015
202015
Impact of electrostatic coupling on monolithic 3D-enabled network on chip
D Lee, S Das, JR Doppa, PP Pande, K Chakrabarty
ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (6 …, 2019
182019
Energy and Area Efficient Near Field Inductive Coupling: A Case Study on 3D NoC
S Gopal, S Das, D Heo, PP Pande
To appear on 11th International Symposium on Networks-on-Chip (NOCS), 2017, 2017
162017
High-Performance and Small-Form Factor Near Field Inductive Coupling for 3D NoC
S Gopal, S Das, P Agarwal, SN Ali, D Heo, PP Pande
IEEE Transactions on Very Large Scale Integration (VLSI) Systems., 2018
142018
Analyzing power-thermal-performance trade-offs in a high-performance 3D NoC architecture
D Lee, S Das, PP Pande
INTEGRATION the VLSI journal, 2018
132018
Abetting Planned Obsolescence by Aging 3D Networks-on-Chip
S Das, K Basu, JR Doppa, PP Pande, R Karri, K Chakrabarty
To appear in Proceedings of IEEE/ACM International Symposium on Networks-on …, 2018
122018
Reliability and performance trade-offs for 3D NoC-enabled multicore chips
S Das, JR Doppa, PP Pande, K Chakrabarty
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
122016
Robust TSV-based 3D NoC Design to Counteract Electromigration and Crosstalk Noise
S Das, JR Doppa, PP Pande, K Chakrabarty
Proceedings of Design, Automation and Test in Europe (DATE), 2017, 2017
102017
Energy-Efficient and Robust 3D NoCs with Contactless Vertical Links
S Das, S Gopal, D Heo, PP Pande
International Conference On Computer Aided Design, 2017, 2017
72017
A Hybrid 3D Interconnect with 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC
S Gopal, S Das, PP Pande, D Heo
IEEE Symposium on Integrated Circuits and Systems, 2020
62020
A Hybrid 3D Interconnect with 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC
S Gopal, S Das, PP Pande, D Heo
IEEE Transactions on Circuits and Systems I, 2020
62020
A PVT-Resilient No-Touch DFT Methodology for Prebond TSV Testing
S Das, F Su, S Chakravarty
To appear in Proceedings of International Test Conference (ITC), 2018
62018
Low cost smart-glass using ESP-32
S Das, S Saxena, NK Rout
2021 IEEE 2nd International Conference on Applied Electromagnetics, Signal …, 2021
52021
Design Space Exploration of 3D Network-on-Chip: A Sensitivity-based Optimization Approach
D Lee, S Das, D Kim, JR Doppa, PP Pande
ACM Journal Emerging Technologies in Computing (JETC), 2018
52018
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