Chih-Cheng Hsieh
Title
Cited by
Cited by
Year
Focal-plane-arrays and CMOS readout techniques of infrared imaging systems
CC Hsieh, CY Wu, FW Jih, TP Sun
IEEE Transactions on Circuits and Systems for Video Technology 7 (4), 594-605, 1997
2641997
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors
WH Chen, KX Li, WY Lin, KH Hsu, PY Li, CH Yang, CX Xue, EY Yang, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 494-496, 2018
1302018
A 2.4-to-5.2 fJ/conversion-step 10b 0.5-to-4MS/s SAR ADC with charge-average switching DAC in 90nm CMOS
CY Liou, CC Hsieh
2013 IEEE international solid-state circuits conference digest of technical …, 2013
1282013
24.1 a 1Mb multibit ReRAM computing-in-memory macro with 14.6 ns parallel MAC computing time for CNN based AI edge processors
CX Xue, WH Chen, JS Liu, JF Li, WY Lin, WE Lin, JH Wang, WC Wei, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 388-390, 2019
942019
A new cryogenic CMOS readout structure for infrared focal plane array
CC Hsieh, CY Wu, TP Sun
IEEE Journal of Solid-State Circuits 32 (8), 1192-1199, 1997
931997
24.5 a twin-8T SRAM computation-in-memory macro for multiple-bit CNN-based machine learning
X Si, JJ Chen, YN Tu, WH Huang, JH Wang, YC Chiu, WC Wei, SY Wu, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 396-398, 2019
882019
High-performance CMOS buffered gate modulation input (BGMI) readout circuits for IR FPA
CC Hsieh, CY Wu, TP Sun, FW Jih, YT Cherng
IEEE journal of solid-state circuits 33 (8), 1188-1198, 1998
861998
A 0.3 V 10-bit 1.17 f SAR ADC with merge and split switching in 90 nm CMOS
JY Lin, CC Hsieh
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (1), 70-79, 2014
772014
A 2.02–5.16 fJ/conversion step 10 bit hybrid coarse-fine SAR ADC with time-domain quantizer in 90 nm CMOS
YJ Chen, KH Chang, CC Hsieh
IEEE Journal of Solid-State Circuits 51 (2), 357-364, 2015
622015
A low-power electronic nose signal-processing chip for a portable artificial olfaction system
KT Tang, SW Chiu, MF Chang, CC Hsieh, JM Shyu
IEEE transactions on biomedical circuits and systems 5 (4), 380-390, 2011
542011
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors
WH Chen, C Dou, KX Li, WY Lin, PY Li, JH Huang, JH Wang, WC Wei, ...
Nature Electronics 2 (9), 420-428, 2019
512019
A 0.44-fJ/conversion-step 11-bit 600-kS/s SAR ADC with semi-resting DAC
SE Hsieh, CC Hsieh
IEEE Journal of Solid-State Circuits 53 (9), 2595-2603, 2018
422018
A 0.4 V 1.94 fJ/conversion-step 10 bit 750 kS/s SAR ADC with input-range-adaptive switching
PC Lee, JY Lin, CC Hsieh
IEEE Transactions on Circuits and Systems I: Regular Papers 63 (12), 2149-2157, 2016
342016
Design, optimization, and performance analysis of new photodiode structures for CMOS active-pixel-sensor (APS) imager applications
CY Wu, YC Shih, JF Lan, CC Hsieh, CC Huang, JH Lu
IEEE Sensors Journal 4 (1), 135-144, 2004
342004
15.5 a 28nm 64Kb 6T SRAM Computing-in-memory macro with 8b MAC operation for AI edge chips
X Si, YN Tu, WH Huanq, JW Su, PJ Lu, JH Wang, TW Liu, SY Wu, R Liu, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 246-248, 2020
332020
A new rail-to-rail comparator with adaptive power control for low power SAR ADCs in biomedical application
SM Chin, CC Hsieh, CF Chiu, HH Tsai
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
332010
15.2 a 28nm 64kb inference-training two-way transpose multibit 6t sram compute-in-memory macro for ai edge chips
JW Su, X Si, YC Chou, TW Chang, WH Huang, YN Tu, R Liu, PJ Lu, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 240-242, 2020
312020
Linear CMOS image sensor with time-delay integration and interlaced super-resolution pixel
JH Chang, KW Cheng, CC Hsieh, WH Chang, HH Tsai, CF Chiu
SENSORS, 2012 IEEE, 1-4, 2012
312012
A 0.4 V 2.02 fJ/conversion-step 10-bit hybrid SAR ADC with time-domain quantizer in 90nm CMOS
YJ Chen, CC Hsieh
2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014
302014
A linear-logarithmic CMOS image sensor with pixel-FPN reduction and tunable response curve
WF Chou, SF Yeh, CF Chiu, CC Hsieh
IEEE Sensors Journal 14 (5), 1625-1632, 2013
302013
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